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Commit 46750db

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committedJan 23, 2016
targets: add automatic csr numbering
1 parent 8464de6 commit 46750db

7 files changed

+87
-79
lines changed
 

‎targets/atlys_base.py

+12-10
Original file line numberDiff line numberDiff line change
@@ -123,15 +123,17 @@ def _get_firmware_data(firmware_filename):
123123
pass
124124
return data
125125

126+
def csr_map_update(csr_map, csr_peripherals):
127+
csr_map.update(dict((n, v) for v, n in enumerate(csr_peripherals, start=max(csr_map.values()) + 1)))
126128

127129
class BaseSoC(SDRAMSoC):
128130
default_platform = "atlys"
129131

130-
csr_map = {
131-
"ddrphy": 16,
132-
"dna": 17,
133-
}
134-
csr_map.update(SDRAMSoC.csr_map)
132+
csr_peripherals = (
133+
"ddrphy",
134+
"dna"
135+
)
136+
csr_map_update(SDRAMSoC.csr_map, csr_peripherals)
135137

136138
mem_map = {
137139
"firmware_ram": 0x20000000, # (default shadow @0xa0000000)
@@ -174,11 +176,11 @@ def __init__(self, platform,
174176

175177

176178
class MiniSoC(BaseSoC):
177-
csr_map = {
178-
"ethphy": 18,
179-
"ethmac": 19,
180-
}
181-
csr_map.update(BaseSoC.csr_map)
179+
csr_peripherals = (
180+
"ethphy",
181+
"ethmac",
182+
)
183+
csr_map_update(BaseSoC.csr_map, csr_peripherals)
182184

183185
interrupt_map = {
184186
"ethmac": 2,

‎targets/atlys_edid_debug.py

+4-4
Original file line numberDiff line numberDiff line change
@@ -26,10 +26,10 @@ def __init__(self):
2626
# - you now have a .vcd you can analyze in GTKwave or others vcd viewers!
2727

2828
class EDIDDebugSoC(VideomixerSoC):
29-
csr_map = {
30-
"logic_analyzer": 30
31-
}
32-
csr_map.update(VideomixerSoC.csr_map)
29+
csr_peripherals = (
30+
"logic_analyzer"
31+
)
32+
csr_map_update(VideomixerSoC.csr_map, csr_peripherals)
3333

3434
def __init__(self, platform, with_uart=False, **kwargs):
3535
VideomixerSoC.__init__(self, platform, with_uart=with_uart, **kwargs)

‎targets/atlys_hdmi2eth.py

+19-19
Original file line numberDiff line numberDiff line change
@@ -12,11 +12,11 @@
1212
from gateware.streamer import UDPStreamer
1313

1414
class EtherboneSoC(BaseSoC):
15-
csr_map = {
16-
"ethphy": 18,
17-
"ethcore": 19,
18-
}
19-
csr_map.update(BaseSoC.csr_map)
15+
csr_peripherals = (
16+
"ethphy",
17+
"ethcore"
18+
)
19+
csr_map_update(BaseSoC.csr_map, csr_peripherals)
2020

2121
def __init__(self, platform,
2222
mac_address=0x10e2d5000000,
@@ -53,15 +53,15 @@ def __init__(self, platform,
5353

5454

5555
class VideomixerSoC(EtherboneSoC):
56-
csr_map = {
57-
"hdmi_out0": 20,
58-
"hdmi_out1": 21,
59-
"hdmi_in0": 22,
60-
"hdmi_in0_edid_mem": 23,
61-
"hdmi_in1": 24,
62-
"hdmi_in1_edid_mem": 25,
63-
}
64-
csr_map.update(EtherboneSoC.csr_map)
56+
csr_peripherals = (
57+
"hdmi_out0",
58+
"hdmi_out1",
59+
"hdmi_in0",
60+
"hdmi_in0_edid_mem",
61+
"hdmi_in1",
62+
"hdmi_in1_edid_mem"
63+
)
64+
csr_map_update(EtherboneSoC.csr_map, csr_peripherals)
6565

6666
interrupt_map = {
6767
"hdmi_in0": 3,
@@ -101,11 +101,11 @@ def __init__(self, platform, **kwargs):
101101
self.add_constant(k, v)
102102

103103
class HDMI2ETHSoC(VideomixerSoC):
104-
csr_map = {
105-
"encoder_reader": 26,
106-
"encoder": 27,
107-
}
108-
csr_map.update(VideomixerSoC.csr_map)
104+
csr_peripherals = (
105+
"encoder_reader",
106+
"encoder"
107+
)
108+
csr_map_update(VideomixerSoC.csr_map, csr_peripherals)
109109
mem_map = {
110110
"encoder": 0x50000000, # (shadow @0xd0000000)
111111
}

‎targets/atlys_hdmi2usb.py

+14-14
Original file line numberDiff line numberDiff line change
@@ -7,15 +7,15 @@
77
from gateware.streamer import USBStreamer
88

99
class VideomixerSoC(BaseSoC):
10-
csr_map = {
11-
"hdmi_out0": 20,
12-
"hdmi_out1": 21,
13-
"hdmi_in0": 22,
14-
"hdmi_in0_edid_mem": 23,
15-
"hdmi_in1": 24,
16-
"hdmi_in1_edid_mem": 25,
17-
}
18-
csr_map.update(BaseSoC.csr_map)
10+
csr_peripherals = (
11+
"hdmi_out0",
12+
"hdmi_out1",
13+
"hdmi_in0",
14+
"hdmi_in0_edid_mem",
15+
"hdmi_in1",
16+
"hdmi_in1_edid_mem"
17+
)
18+
csr_map_update(BaseSoC.csr_map, csr_peripherals)
1919

2020
interrupt_map = {
2121
"hdmi_in0": 3,
@@ -55,11 +55,11 @@ def __init__(self, platform, **kwargs):
5555
self.add_constant(k, v)
5656

5757
class HDMI2USBSoC(VideomixerSoC):
58-
csr_map = {
59-
"encoder_reader": 26,
60-
"encoder": 27
61-
}
62-
csr_map.update(VideomixerSoC.csr_map)
58+
csr_peripherals = (
59+
"encoder_reader",
60+
"encoder"
61+
)
62+
csr_map_update(VideomixerSoC.csr_map, csr_peripherals)
6363
mem_map = {
6464
"encoder": 0x50000000, # (shadow @0xd0000000)
6565
}

‎targets/opsis_base.py

+17-14
Original file line numberDiff line numberDiff line change
@@ -140,19 +140,22 @@ def _get_firmware_data(firmware_filename):
140140
pass
141141
return data
142142

143+
def csr_map_update(csr_map, csr_peripherals):
144+
csr_map.update(dict((n, v) for v, n in enumerate(csr_peripherals, start=max(csr_map.values()) + 1)))
145+
143146

144147
class BaseSoC(SDRAMSoC):
145148
default_platform = "opsis"
146149

147-
csr_map = {
148-
"ddrphy": 16,
149-
"dna": 17,
150-
"fx2_reset": 18,
151-
"fx2_hack": 19,
152-
# "opsis_eeprom_i2c": 20,
153-
"tofe_eeprom_i2c": 20,
154-
}
155-
csr_map.update(SDRAMSoC.csr_map)
150+
csr_peripherals = (
151+
"ddrphy",
152+
"dna",
153+
"fx2_reset",
154+
"fx2_hack",
155+
# "opsis_eeprom_i2c",
156+
"tofe_eeprom_i2c"
157+
)
158+
csr_map_update(SDRAMSoC.csr_map, csr_peripherals)
156159

157160
mem_map = {
158161
"firmware_ram": 0x20000000, # (default shadow @0xa0000000)
@@ -200,11 +203,11 @@ def __init__(self, platform,
200203

201204

202205
class MiniSoC(BaseSoC):
203-
csr_map = {
204-
"ethphy": 21,
205-
"ethmac": 22,
206-
}
207-
csr_map.update(BaseSoC.csr_map)
206+
csr_peripherals = (
207+
"ethphy",
208+
"ethmac"
209+
)
210+
csr_map_update(BaseSoC.csr_map, csr_peripherals)
208211

209212
interrupt_map = {
210213
"ethmac": 2,

‎targets/opsis_hdmi2usb.py

+5-6
Original file line numberDiff line numberDiff line change
@@ -54,13 +54,12 @@ def __init__(self, platform, **kwargs):
5454
for k, v in platform.hdmi_infos.items():
5555
self.add_constant(k, v)
5656

57-
5857
class HDMI2USBSoC(VideomixerSoC):
59-
csr_map = {
60-
"encoder_reader": 27,
61-
"encoder": 28,
62-
}
63-
csr_map.update(VideomixerSoC.csr_map)
58+
csr_peripherals = (
59+
"encoder_reader",
60+
"encoder"
61+
)
62+
csr_map_update(VideomixerSoC.csr_map, csr_peripherals)
6463
mem_map = {
6564
"encoder": 0x50000000, # (shadow @0xd0000000)
6665
}

‎targets/pipistrello_base.py

+16-12
Original file line numberDiff line numberDiff line change
@@ -125,17 +125,21 @@ def _get_firmware_data(firmware_filename):
125125
("fx2_reset", 0, Pins("K13"), IOStandard("LVCMOS33")), #, Misc("PULLUP")),
126126
]
127127

128+
def csr_map_update(csr_map, csr_peripherals):
129+
csr_map.update(dict((n, v) for v, n in enumerate(csr_peripherals, start=max(csr_map.values()) + 1)))
130+
131+
128132
class BaseSoC(SDRAMSoC):
129133
default_platform = "pipistrello"
130134

131-
csr_map = {
132-
"spiflash": 16,
133-
"ddrphy": 17,
134-
"dna": 18,
135-
"fx2_reset": 19,
136-
"fx2_hack": 20,
137-
}
138-
csr_map.update(SDRAMSoC.csr_map)
135+
csr_peripherals = (
136+
"spiflash",
137+
"ddrphy",
138+
"dna",
139+
"fx2_reset",
140+
"fx2_hack"
141+
)
142+
csr_map_update(SDRAMSoC.csr_map, csr_peripherals)
139143

140144
mem_map = {
141145
"firmware_ram": 0x20000000, # (default shadow @0xa0000000)
@@ -190,10 +194,10 @@ def __init__(self, platform, clk_freq=(83 + Fraction(1, 3))*1000*1000,
190194

191195
class VideomixerSoC(BaseSoC):
192196

193-
csr_map = {
194-
"hdmi_out0": 21,
195-
}
196-
csr_map.update(BaseSoC.csr_map)
197+
csr_peripherals = (
198+
"hdmi_out0"
199+
)
200+
csr_map_update(BaseSoC.csr_map, csr_peripherals)
197201

198202
def __init__(self, platform, **kwargs):
199203
BaseSoC.__init__(self, platform, **kwargs)

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