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targets: add automatic csr numbering
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enjoy-digital committed Jan 23, 2016
1 parent 8464de6 commit 46750db
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Showing 7 changed files with 87 additions and 79 deletions.
22 changes: 12 additions & 10 deletions targets/atlys_base.py
Expand Up @@ -123,15 +123,17 @@ def _get_firmware_data(firmware_filename):
pass
return data

def csr_map_update(csr_map, csr_peripherals):
csr_map.update(dict((n, v) for v, n in enumerate(csr_peripherals, start=max(csr_map.values()) + 1)))

class BaseSoC(SDRAMSoC):
default_platform = "atlys"

csr_map = {
"ddrphy": 16,
"dna": 17,
}
csr_map.update(SDRAMSoC.csr_map)
csr_peripherals = (
"ddrphy",
"dna"
)
csr_map_update(SDRAMSoC.csr_map, csr_peripherals)

mem_map = {
"firmware_ram": 0x20000000, # (default shadow @0xa0000000)
Expand Down Expand Up @@ -174,11 +176,11 @@ def __init__(self, platform,


class MiniSoC(BaseSoC):
csr_map = {
"ethphy": 18,
"ethmac": 19,
}
csr_map.update(BaseSoC.csr_map)
csr_peripherals = (
"ethphy",
"ethmac",
)
csr_map_update(BaseSoC.csr_map, csr_peripherals)

interrupt_map = {
"ethmac": 2,
Expand Down
8 changes: 4 additions & 4 deletions targets/atlys_edid_debug.py
Expand Up @@ -26,10 +26,10 @@ def __init__(self):
# - you now have a .vcd you can analyze in GTKwave or others vcd viewers!

class EDIDDebugSoC(VideomixerSoC):
csr_map = {
"logic_analyzer": 30
}
csr_map.update(VideomixerSoC.csr_map)
csr_peripherals = (
"logic_analyzer"
)
csr_map_update(VideomixerSoC.csr_map, csr_peripherals)

def __init__(self, platform, with_uart=False, **kwargs):
VideomixerSoC.__init__(self, platform, with_uart=with_uart, **kwargs)
Expand Down
38 changes: 19 additions & 19 deletions targets/atlys_hdmi2eth.py
Expand Up @@ -12,11 +12,11 @@
from gateware.streamer import UDPStreamer

class EtherboneSoC(BaseSoC):
csr_map = {
"ethphy": 18,
"ethcore": 19,
}
csr_map.update(BaseSoC.csr_map)
csr_peripherals = (
"ethphy",
"ethcore"
)
csr_map_update(BaseSoC.csr_map, csr_peripherals)

def __init__(self, platform,
mac_address=0x10e2d5000000,
Expand Down Expand Up @@ -53,15 +53,15 @@ def __init__(self, platform,


class VideomixerSoC(EtherboneSoC):
csr_map = {
"hdmi_out0": 20,
"hdmi_out1": 21,
"hdmi_in0": 22,
"hdmi_in0_edid_mem": 23,
"hdmi_in1": 24,
"hdmi_in1_edid_mem": 25,
}
csr_map.update(EtherboneSoC.csr_map)
csr_peripherals = (
"hdmi_out0",
"hdmi_out1",
"hdmi_in0",
"hdmi_in0_edid_mem",
"hdmi_in1",
"hdmi_in1_edid_mem"
)
csr_map_update(EtherboneSoC.csr_map, csr_peripherals)

interrupt_map = {
"hdmi_in0": 3,
Expand Down Expand Up @@ -101,11 +101,11 @@ def __init__(self, platform, **kwargs):
self.add_constant(k, v)

class HDMI2ETHSoC(VideomixerSoC):
csr_map = {
"encoder_reader": 26,
"encoder": 27,
}
csr_map.update(VideomixerSoC.csr_map)
csr_peripherals = (
"encoder_reader",
"encoder"
)
csr_map_update(VideomixerSoC.csr_map, csr_peripherals)
mem_map = {
"encoder": 0x50000000, # (shadow @0xd0000000)
}
Expand Down
28 changes: 14 additions & 14 deletions targets/atlys_hdmi2usb.py
Expand Up @@ -7,15 +7,15 @@
from gateware.streamer import USBStreamer

class VideomixerSoC(BaseSoC):
csr_map = {
"hdmi_out0": 20,
"hdmi_out1": 21,
"hdmi_in0": 22,
"hdmi_in0_edid_mem": 23,
"hdmi_in1": 24,
"hdmi_in1_edid_mem": 25,
}
csr_map.update(BaseSoC.csr_map)
csr_peripherals = (
"hdmi_out0",
"hdmi_out1",
"hdmi_in0",
"hdmi_in0_edid_mem",
"hdmi_in1",
"hdmi_in1_edid_mem"
)
csr_map_update(BaseSoC.csr_map, csr_peripherals)

interrupt_map = {
"hdmi_in0": 3,
Expand Down Expand Up @@ -55,11 +55,11 @@ def __init__(self, platform, **kwargs):
self.add_constant(k, v)

class HDMI2USBSoC(VideomixerSoC):
csr_map = {
"encoder_reader": 26,
"encoder": 27
}
csr_map.update(VideomixerSoC.csr_map)
csr_peripherals = (
"encoder_reader",
"encoder"
)
csr_map_update(VideomixerSoC.csr_map, csr_peripherals)
mem_map = {
"encoder": 0x50000000, # (shadow @0xd0000000)
}
Expand Down
31 changes: 17 additions & 14 deletions targets/opsis_base.py
Expand Up @@ -140,19 +140,22 @@ def _get_firmware_data(firmware_filename):
pass
return data

def csr_map_update(csr_map, csr_peripherals):
csr_map.update(dict((n, v) for v, n in enumerate(csr_peripherals, start=max(csr_map.values()) + 1)))


class BaseSoC(SDRAMSoC):
default_platform = "opsis"

csr_map = {
"ddrphy": 16,
"dna": 17,
"fx2_reset": 18,
"fx2_hack": 19,
# "opsis_eeprom_i2c": 20,
"tofe_eeprom_i2c": 20,
}
csr_map.update(SDRAMSoC.csr_map)
csr_peripherals = (
"ddrphy",
"dna",
"fx2_reset",
"fx2_hack",
# "opsis_eeprom_i2c",
"tofe_eeprom_i2c"
)
csr_map_update(SDRAMSoC.csr_map, csr_peripherals)

mem_map = {
"firmware_ram": 0x20000000, # (default shadow @0xa0000000)
Expand Down Expand Up @@ -200,11 +203,11 @@ def __init__(self, platform,


class MiniSoC(BaseSoC):
csr_map = {
"ethphy": 21,
"ethmac": 22,
}
csr_map.update(BaseSoC.csr_map)
csr_peripherals = (
"ethphy",
"ethmac"
)
csr_map_update(BaseSoC.csr_map, csr_peripherals)

interrupt_map = {
"ethmac": 2,
Expand Down
11 changes: 5 additions & 6 deletions targets/opsis_hdmi2usb.py
Expand Up @@ -54,13 +54,12 @@ def __init__(self, platform, **kwargs):
for k, v in platform.hdmi_infos.items():
self.add_constant(k, v)


class HDMI2USBSoC(VideomixerSoC):
csr_map = {
"encoder_reader": 27,
"encoder": 28,
}
csr_map.update(VideomixerSoC.csr_map)
csr_peripherals = (
"encoder_reader",
"encoder"
)
csr_map_update(VideomixerSoC.csr_map, csr_peripherals)
mem_map = {
"encoder": 0x50000000, # (shadow @0xd0000000)
}
Expand Down
28 changes: 16 additions & 12 deletions targets/pipistrello_base.py
Expand Up @@ -125,17 +125,21 @@ def _get_firmware_data(firmware_filename):
("fx2_reset", 0, Pins("K13"), IOStandard("LVCMOS33")), #, Misc("PULLUP")),
]

def csr_map_update(csr_map, csr_peripherals):
csr_map.update(dict((n, v) for v, n in enumerate(csr_peripherals, start=max(csr_map.values()) + 1)))


class BaseSoC(SDRAMSoC):
default_platform = "pipistrello"

csr_map = {
"spiflash": 16,
"ddrphy": 17,
"dna": 18,
"fx2_reset": 19,
"fx2_hack": 20,
}
csr_map.update(SDRAMSoC.csr_map)
csr_peripherals = (
"spiflash",
"ddrphy",
"dna",
"fx2_reset",
"fx2_hack"
)
csr_map_update(SDRAMSoC.csr_map, csr_peripherals)

mem_map = {
"firmware_ram": 0x20000000, # (default shadow @0xa0000000)
Expand Down Expand Up @@ -190,10 +194,10 @@ def __init__(self, platform, clk_freq=(83 + Fraction(1, 3))*1000*1000,

class VideomixerSoC(BaseSoC):

csr_map = {
"hdmi_out0": 21,
}
csr_map.update(BaseSoC.csr_map)
csr_peripherals = (
"hdmi_out0"
)
csr_map_update(BaseSoC.csr_map, csr_peripherals)

def __init__(self, platform, **kwargs):
BaseSoC.__init__(self, platform, **kwargs)
Expand Down

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