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Commit fa4a756

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committedJan 23, 2016
firmware/lm32: now all warnings should be fixed
1 parent a9c7891 commit fa4a756

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3 files changed

+11
-20
lines changed

3 files changed

+11
-20
lines changed
 

‎firmware/lm32/ci.c

+2-5
Original file line numberDiff line numberDiff line change
@@ -310,14 +310,11 @@ static void video_mode_set(int mode)
310310

311311
static void hdp_toggle(int source)
312312
{
313-
#if defined(CSR_HDMI_IN0_BASE) || defined(CSR_HDMI_IN1_BASE)
314-
int i;
315-
#endif
316313
printf("Toggling HDP on output%d\n", source);
317314
#ifdef CSR_HDMI_IN0_BASE
318315
if(source == VIDEO_IN_HDMI_IN0) {
319316
hdmi_in0_edid_hpd_en_write(0);
320-
for(i=0; i<65536; i++);
317+
for(int i=0; i<65536; i++);
321318
hdmi_in0_edid_hpd_en_write(1);
322319
}
323320
#else
@@ -326,7 +323,7 @@ static void hdp_toggle(int source)
326323
#ifdef CSR_HDMI_IN1_BASE
327324
if(source == VIDEO_IN_HDMI_IN1) {
328325
hdmi_in1_edid_hpd_en_write(0);
329-
for(i=0; i<65536; i++);
326+
for(int i=0; i<65536; i++);
330327
hdmi_in1_edid_hpd_en_write(1);
331328
}
332329
#else

‎firmware/lm32/pll.c

+6-10
Original file line numberDiff line numberDiff line change
@@ -27,31 +27,29 @@ static const unsigned short int pll_config_10x[32] = {
2727

2828
static void program_data(const unsigned short *data)
2929
{
30-
int i;
31-
3230
/*
3331
* Some bits of words 4 and 5 appear to depend on PLL location,
3432
* so we start at word 6.
3533
* PLLs also seem to dislike any write to the last words.
3634
*/
3735
#ifdef CSR_HDMI_OUT0_BASE
38-
for(i=6;i<32-5;i++) {
36+
for(int i=6;i<32-5;i++) {
3937
hdmi_out0_driver_clocking_pll_adr_write(i);
4038
hdmi_out0_driver_clocking_pll_dat_w_write(data[i]);
4139
hdmi_out0_driver_clocking_pll_write_write(1);
4240
while(!hdmi_out0_driver_clocking_pll_drdy_read());
4341
}
4442
#endif
4543
#ifdef CSR_HDMI_IN0_BASE
46-
for(i=6;i<32-5;i++) {
44+
for(int i=6;i<32-5;i++) {
4745
hdmi_in0_clocking_pll_adr_write(i);
4846
hdmi_in0_clocking_pll_dat_w_write(data[i]);
4947
hdmi_in0_clocking_pll_write_write(1);
5048
while(!hdmi_in0_clocking_pll_drdy_read());
5149
}
5250
#endif
5351
#ifdef CSR_HDMI_IN1_BASE
54-
for(i=6;i<32-5;i++) {
52+
for(int i=6;i<32-5;i++) {
5553
hdmi_in1_clocking_pll_adr_write(i);
5654
hdmi_in1_clocking_pll_dat_w_write(data[i]);
5755
hdmi_in1_clocking_pll_write_write(1);
@@ -84,11 +82,9 @@ void pll_config_for_clock(int freq)
8482

8583
void pll_dump(void)
8684
{
87-
int i;
88-
8985
#ifdef CSR_HDMI_OUT0_BASE
9086
printf("framebuffer PLL:\n");
91-
for(i=0;i<32;i++) {
87+
for(int i=0;i<32;i++) {
9288
hdmi_out0_driver_clocking_pll_adr_write(i);
9389
hdmi_out0_driver_clocking_pll_read_write(1);
9490
while(!hdmi_out0_driver_clocking_pll_drdy_read());
@@ -98,7 +94,7 @@ void pll_dump(void)
9894
#endif
9995
#ifdef CSR_HDMI_IN0_BASE
10096
printf("dvisampler0 PLL:\n");
101-
for(i=0;i<32;i++) {
97+
for(int i=0;i<32;i++) {
10298
hdmi_in0_clocking_pll_adr_write(i);
10399
hdmi_in0_clocking_pll_read_write(1);
104100
while(!hdmi_in0_clocking_pll_drdy_read());
@@ -108,7 +104,7 @@ void pll_dump(void)
108104
#endif
109105
#ifdef CSR_HDMI_IN1_BASE
110106
printf("dvisampler1 PLL:\n");
111-
for(i=0;i<32;i++) {
107+
for(int i=0;i<32;i++) {
112108
hdmi_in1_clocking_pll_adr_write(i);
113109
hdmi_in1_clocking_pll_read_write(1);
114110
while(!hdmi_in1_clocking_pll_drdy_read());

‎firmware/lm32/processor.c

+3-5
Original file line numberDiff line numberDiff line change
@@ -266,10 +266,9 @@ void processor_list_modes(char *mode_descriptors)
266266

267267
static void fb_clkgen_write(int cmd, int data)
268268
{
269+
#ifdef CSR_HDMI_OUT0_BASE
269270
int word;
270-
271271
word = (data << 2) | cmd;
272-
#ifdef CSR_HDMI_OUT0_BASE
273272
hdmi_out0_driver_clocking_cmd_data_write(word);
274273
hdmi_out0_driver_clocking_send_cmd_data_write(1);
275274
while(hdmi_out0_driver_clocking_status_read() & CLKGEN_STATUS_BUSY);
@@ -349,16 +348,15 @@ static void edid_set_mode(const struct video_timing *mode)
349348
{
350349
#if defined(CSR_HDMI_IN0_BASE) || defined(CSR_HDMI_IN1_BASE)
351350
unsigned char edid[128];
352-
int i;
353351
#endif
354352
#ifdef CSR_HDMI_IN0_BASE
355353
generate_edid(&edid, "OHW", "TV", 2015, "HDMI2USB 1", mode);
356-
for(i=0;i<sizeof(edid);i++)
354+
for(int i=0;i<sizeof(edid);i++)
357355
MMPTR(CSR_HDMI_IN0_EDID_MEM_BASE+4*i) = edid[i];
358356
#endif
359357
#ifdef CSR_HDMI_IN1_BASE
360358
generate_edid(&edid, "OHW", "TV", 2015, "HDMI2USB 2", mode);
361-
for(i=0;i<sizeof(edid);i++)
359+
for(int i=0;i<sizeof(edid);i++)
362360
MMPTR(CSR_HDMI_IN1_EDID_MEM_BASE+4*i) = edid[i];
363361
#endif
364362
}

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