m-labs · Jan 25, 2016 · Jan 25, 2016 · Jan 25, 2016
Showing with 15 additions and 14 deletions.

+7 −7 artiq/coredevice/comm_generic.py

+4 −0 artiq/coredevice/exceptions.py

+2 −2 artiq/frontend/artiq_run.py

+0 −1 artiq/language/core.py

+1 −3 doc/manual/conf.py

+1 −1 doc/manual/getting_started_core.rst
diff --git a/artiq/coredevice/comm_generic.py b/artiq/coredevice/comm_generic.py
@@ -457,8 +457,8 @@ def _serve_rpc(self, object_map):
 
             self._write_header(_H2DMsgType.RPC_EXCEPTION)
 
-            if hasattr(exn, 'core_exception'):
-                exn = exn.core_exception
+            if hasattr(exn, 'artiq_core_exception'):
+                exn = exn.artiq_core_exception
                 self._write_string(exn.name)
                 self._write_string(exn.message)
                 for index in range(3):
@@ -504,15 +504,15 @@ def _serve_exception(self, object_map, symbolizer):
 
         traceback = list(reversed(symbolizer(backtrace))) + \
                     [(filename, line, column, function, None)]
-        core_exception = exceptions.CoreException(name, message, params, traceback)
+        core_exn = exceptions.CoreException(name, message, params, traceback)
 
-        if core_exception.id == 0:
-            python_exn_type = getattr(exceptions, core_exception.name.split('.')[-1])
+        if core_exn.id == 0:
+            python_exn_type = getattr(exceptions, core_exn.name.split('.')[-1])
         else:
-            python_exn_type = object_map.retrieve(core_exception.id)
+            python_exn_type = object_map.retrieve(core_exn.id)
 
         python_exn = python_exn_type(message.format(*params))
-        python_exn.core_exception = core_exception
+        python_exn.artiq_core_exception = core_exn
         raise python_exn
 
     def serve(self, object_map, symbolizer):

diff --git a/artiq/coredevice/exceptions.py b/artiq/coredevice/exceptions.py
@@ -1,4 +1,8 @@
 import builtins
+import linecache
+import re
+import os
+
 from artiq.coredevice.runtime import source_loader
 
 

diff --git a/artiq/frontend/artiq_run.py b/artiq/frontend/artiq_run.py
@@ -132,8 +132,8 @@ def run(with_file=False):
     except CompileError as error:
         return
     except Exception as exn:
-        if hasattr(exn, 'core_exception'):
-            print(exn.core_exception, file=sys.stderr)
+        if hasattr(exn, 'artiq_core_exception'):
+            print(exn.artiq_core_exception, file=sys.stderr)
         raise exn
     finally:
         device_mgr.close_devices()

diff --git a/artiq/language/core.py b/artiq/language/core.py
@@ -2,7 +2,6 @@
 Core ARTIQ extensions to the Python language.
 """
 
-import os, linecache, re
 from collections import namedtuple
 from functools import wraps
 

diff --git a/doc/manual/conf.py b/doc/manual/conf.py
@@ -75,11 +75,9 @@ def __getattr__(cls, name):
 # built documents.
 #
 # The short X.Y version.
-# version = 'prerelease'
+version = artiq_version.split('+', 1)[0]
 # The full version, including alpha/beta/rc tags.
-# release = 'prerelease'
 release = artiq_version
-version = release.split('+', 1)[0]
 
 # The language for content autogenerated by Sphinx. Refer to documentation
 # for a list of supported languages.

diff --git a/doc/manual/getting_started_core.rst b/doc/manual/getting_started_core.rst
@@ -114,7 +114,7 @@ Instead, inside the core device, output timing is generated by the gateware and
 
 Try reducing the period of the generated waveform until the CPU cannot keep up with the generation of switching events and the underflow exception is raised. Then try catching it: ::
 
-    from artiq.coredevice.exceptions import RTIOUnderflow
+    from artiq.experiment import *
 
 
     def print_underflow():