hardware_testbench: fix timeout handling

m-labs · Jan 28, 2016 · ab5e8fd · ab5e8fd
1 parent 982fbb0
commit ab5e8fd
Showing 1 changed file with 12 additions and 13 deletions.
diff --git a/artiq/test/hardware_testbench.py b/artiq/test/hardware_testbench.py
@@ -24,11 +24,12 @@ class ControllerCase(unittest.TestCase):
     def setUp(self):
         self.device_db = DeviceDB(os.path.join(artiq_root, "device_db.pyon"))
         self.device_mgr = DeviceManager(self.device_db)
-        self.addCleanup(self.device_mgr.close_devices)
         self.controllers = {}
 
     def tearDown(self):
-        self.stop_controllers()
+        self.device_mgr.close_devices()
+        for name in list(self.controllers):
+            self.stop_controller(name)
 
     def start_controller(self, name, sleep=1):
         try:
@@ -42,17 +43,15 @@ def start_controller(self, name, sleep=1):
         self.controllers[name] = entry, proc
         time.sleep(sleep)
 
-    def stop_controllers(self):
-        for entry, proc in self.controllers.values():
-            proc.terminate()
-        for name in list(self.controllers):
-            entry, proc = self.controllers[name]
-            try:
-                proc.wait(entry.get("term_timeout"))
-            except TimeoutError:
-                proc.kill()
-                proc.wait(entry.get("term_timeout"))
-            del self.controllers[name]
+    def stop_controller(self, name, default_timeout=1):
+        entry, proc = self.controllers[name]
+        t = entry.get("term_timeout", default_timeout)
+        try:
+            proc.wait(t)
+        except subprocess.TimeoutExpired:
+            proc.kill()
+            proc.wait(t)
+        del self.controllers[name]
 
 
 @unittest.skipUnless(artiq_root, "no ARTIQ_ROOT")