Temporary hack for Jimmo's MimasV2 change.

timvideos · Mar 12, 2017 · ab27f57 · ab27f57
1 parent 3bee9b7
commit ab27f57
Show file tree

Hide file tree

Showing 2 changed files with 17 additions and 5 deletions.
diff --git a/targets/mimasv2/Makefile.mk b/targets/mimasv2/Makefile.mk
@@ -1,35 +1,44 @@
 # mimasv2 loading
 
 TARGET ?= base
+
 # FIXME(mithro): Detect the real serial port/add see udev rules to HDMI2USB-mode-switch...
+ifeq ($(JIMMO),)
 PORT ?= /dev/ttyACM0
+PROG_PORT ?= $(PORT)
+COMM_PORT ?= $(PORT)
 BAUD ?= 19200
+else
+PROG_PORT ?= /dev/ttyACM0
+COMM_PORT ?= /dev/ttyACM1
+BAUD ?= 115200
+endif
 
 gateware-load-mimasv2:
 	@echo "MimasV2 doesn't support loading, use the flash target instead."
 	@echo "make gateware-flash"
 	@false
 
 gateware-flash-mimasv2:
-	$(PYTHON) $$(which MimasV2Config.py) $(PORT) $(TARGET_BUILD_DIR)/gateware/top.bin
+	$(PYTHON) $$(which MimasV2Config.py) $(PROG_PORT) $(TARGET_BUILD_DIR)/gateware/top.bin
 
 image-load-mimasv2:
 	@echo "MimasV2 doesn't support loading, use the flash target instead."
 	@echo "make image-flash"
 	@false
 
 image-flash-mimasv2:
-	$(PYTHON) $$(which MimasV2Config.py) $(PORT) $(TARGET_BUILD_DIR)/flash.bin
+	$(PYTHON) $$(which MimasV2Config.py) $(PROG_PORT) $(TARGET_BUILD_DIR)/flash.bin
 
 firmware-load-mimasv2:
-	flterm --port=$(PORT) --kernel=$(TARGET_BUILD_DIR)/software/firmware/firmware.bin --speed=$(BAUD)
+	flterm --port=$(COMM_PORT) --kernel=$(TARGET_BUILD_DIR)/software/firmware/firmware.bin --speed=$(BAUD)
 
 firmware-flash-mimasv2:
 	@echo "MimasV2 doesn't support just flashing firmware, use image target instead."
 	@echo "make image-flash"
 	@false
 
 firmware-connect-mimasv2:
-	flterm --port=$(PORT) --speed=$(BAUD)
+	flterm --port=$(COMM_PORT) --speed=$(BAUD)
 
 .PHONY: gateware-load-mimasv2 firmware-load-mimasv2
diff --git a/targets/mimasv2/base.py b/targets/mimasv2/base.py
@@ -1,4 +1,7 @@
 # Support for the MimasV2
+
+import os
+
 from fractions import Fraction
 
 from litex.gen import *
@@ -186,7 +189,7 @@ def __init__(self, platform, **kwargs):
             #integrated_rom_size=0x8000,
             integrated_rom_size=None,
             integrated_sram_size=0x4000,
-            uart_baudrate=19200,
+            uart_baudrate=(19200, 115200)[int(os.environ.get('JIMMO', '0'))],
             cpu_reset_address=platform.gateware_size,
             **kwargs)
         self.submodules.crg = _CRG(platform, clk_freq)