Skip to content
Permalink

Comparing changes

Choose two branches to see what’s changed or to start a new pull request. If you need to, you can also or learn more about diff comparisons.

Open a pull request

Create a new pull request by comparing changes across two branches. If you need to, you can also . Learn more about diff comparisons here.
base repository: m-labs/artiq
Failed to load repositories. Confirm that selected base ref is valid, then try again.
Loading
base: 212ee8ca35ec
Choose a base ref
...
head repository: m-labs/artiq
Failed to load repositories. Confirm that selected head ref is valid, then try again.
Loading
compare: faa268e81450
Choose a head ref
  • 3 commits
  • 2 files changed
  • 1 contributor

Commits on Apr 13, 2016

  1. typo

    @sbourdeauducq
    sbourdeauducq committed Apr 13, 2016
    Copy the full SHA
    a503872 View commit details

  2. manual/installing: -H nist_...

    @sbourdeauducq
    sbourdeauducq committed Apr 13, 2016
    Copy the full SHA
    6fc73a0 View commit details

  3. manual/installing: --toolchain vivado

    @sbourdeauducq
    sbourdeauducq committed Apr 13, 2016
    Copy the full SHA
    faa268e View commit details
Showing with 4 additions and 2 deletions.
  1. +1 −1 doc/manual/faq.rst
  2. +3 −1 doc/manual/installing.rst
2 changes: 1 addition & 1 deletion doc/manual/faq.rst
View file
Original file line number Diff line number Diff line change
@@ -99,7 +99,7 @@ The core device tests require the following TTL devices and connections:

* ``ttl_out``: any output-only TTL.
* ``ttl_out_serdes``: any output-only TTL that uses a SERDES (i.e. has a fine timestamp). Can be aliased to ``ttl_out``.
* ``loop_out``: : any output-only TTL. Must be physically connected to ``loop_in``. Can be aliased to ``ttl_out``.
* ``loop_out``: any output-only TTL. Must be physically connected to ``loop_in``. Can be aliased to ``ttl_out``.
* ``loop_in``: any input-capable TTL. Must be physically connected to ``loop_out``.
* ``loop_clock_out``: a clock generator TTL. Must be physically connected to ``loop_clock_in``.
* ``loop_clock_in``: any input-capable TTL. Must be physically connected to ``loop_clock_out``.
4 changes: 3 additions & 1 deletion doc/manual/installing.rst
View file
Original file line number Diff line number Diff line change
@@ -267,7 +267,9 @@ These steps are required to generate gateware bitstream (``.bit``) files, build

* For KC705::

$ python3.5 -m artiq.gateware.targets.kc705 -H qc1 # or qc2
$ python3.5 -m artiq.gateware.targets.kc705 -H nist_qc1 # or nist_qc2

.. note:: Add ``--toolchain vivado`` if you wish to use Vivado instead of ISE.

* Then, gather the binaries and flash them: ::