platform/kc705: extract si5324 clocks into a separate signal.

m-labs · Jun 7, 2016 · 73f9b87 · 73f9b87
1 parent 0c61422
commit 73f9b87
Showing 1 changed file with 9 additions and 5 deletions.
diff --git a/migen/build/platforms/kc705.py b/migen/build/platforms/kc705.py
@@ -209,11 +209,15 @@
 
     ("si5324", 0,
         Subsignal("rst_n", Pins("AE20"), IOStandard("LVCMOS25")),
-        Subsignal("int", Pins("AG24"), IOStandard("LVCMOS25")),
-        Subsignal("clkin_p", Pins("W27"), IOStandard("LVDS_25")),
-        Subsignal("clkin_n", Pins("W28"), IOStandard("LVDS_25")),
-        Subsignal("clkout_p", Pins("L8")),
-        Subsignal("clkout_n", Pins("L7"))
+        Subsignal("int", Pins("AG24"), IOStandard("LVCMOS25"))
+    ),
+    ("si5324_clkin", 0,
+        Subsignal("p", Pins("W27"), IOStandard("LVDS_25")),
+        Subsignal("n", Pins("W28"), IOStandard("LVDS_25"))
+    ),
+    ("si5324_clkout", 0,
+        Subsignal("p", Pins("L8")),
+        Subsignal("n", Pins("L7"))
     ),
 ]