gateware/nist_clock: increase DDS bus drive strength. Closes #468

m-labs · Jun 7, 2016 · 3bd190e · 3bd190e
1 parent e47538c
commit 3bd190e
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/artiq/gateware/nist_clock.py b/artiq/gateware/nist_clock.py
@@ -36,7 +36,7 @@
         Subsignal("wr_n", Pins("LPC:LA24_P")),
         Subsignal("rd_n", Pins("LPC:LA25_N")),
         Subsignal("rst", Pins("LPC:LA25_P")),
-        IOStandard("LVTTL")),
+        IOStandard("LVTTL"), Misc("DRIVE=24")),
 
     ("i2c_fmc", 0,
         Subsignal("scl", Pins("LPC:IIC_SCL")),