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Commit ebbfdc5

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committedFeb 1, 2016
Merge remote-tracking branch 'upstream/master' into lca2016
2 parents bba0e3e + e452948 commit ebbfdc5

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3 files changed

+19
-3
lines changed

3 files changed

+19
-3
lines changed
 

‎firmware/lm32/edid.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -218,7 +218,7 @@ void generate_edid(void *out,
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e->video_input = 0x80; /* digital */
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e->h_image_size = timing->h_active/64;
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e->v_image_size = timing->v_active/64;
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e->gamma = 0xff;
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e->gamma = 0x78;
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e->feature_support = 0x06;
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e->cc_rg_l = 0;

‎firmware/lm32/processor.c

+17-1
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@
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(1|a) (2) (3) (4)
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ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520
50-
|\-(c)-/\-(b)-/ |
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|\-(c)-/\-(d)-/ |
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| 24 40 |
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| |
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\--------(b)-------/
@@ -281,7 +281,23 @@ static const struct video_timing video_modes[PROCESSOR_MODE_COUNT] = {
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.v_sync_offset = 1,
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.v_sync_width = 3,
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.comment = "(HV20/HV30 in NTSC mode)"
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},
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// 720x576 @ 50.00 Hz Modeline 720x576" 32.67 720 744 816 912 576 577 580 597 -HSync +Vsyncc
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{
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.pixel_clock = 3267,
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.h_active = 720,
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.h_blanking = 192,
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.h_sync_offset = 24,
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.h_sync_width = 72,
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.v_active = 576,
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.v_blanking = 21,
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.v_sync_offset = 1,
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.v_sync_width = 3,
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.comment = "(HV20/HV30 in PAL mode)"
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}
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};
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void processor_list_modes(char *mode_descriptors)

‎firmware/lm32/processor.h

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Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
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#ifndef __PROCESSOR_H
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#define __PROCESSOR_H
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4-
#define PROCESSOR_MODE_COUNT 13
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#define PROCESSOR_MODE_COUNT 14
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#define PROCESSOR_MODE_DESCLEN 64
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enum {

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