gateware/rtio/analyzer: use new Converter

m-labs · Mar 14, 2016 · 8ad799a · 8ad799a
1 parent 5714ffe
commit 8ad799a
Showing 1 changed file with 1 addition and 2 deletions.
diff --git a/artiq/gateware/rtio/analyzer.py b/artiq/gateware/rtio/analyzer.py
@@ -191,8 +191,7 @@ def __init__(self, rtio_core, membus, fifo_depth=128):
         dw = len(membus.dat_w)
 
         self.submodules.message_encoder = MessageEncoder(rtio_core)
-        self.submodules.converter = stream.Converter(
-            [("data", 256)], [("data", dw)], reverse=True)
+        self.submodules.converter = stream.Converter(256, dw, reverse=True)
         self.submodules.fifo = stream.SyncFIFO(
             [("data", dw)], fifo_depth, True)
         self.submodules.dma = DMAWriter(membus)