Skip to content

Commit 861c4a9

Browse files
committedMar 9, 2016
fix more multi-DDS-bus problems
1 parent de37487 commit 861c4a9

File tree

2 files changed

+10
-5
lines changed

2 files changed

+10
-5
lines changed
 

‎artiq/runtime/dds.c

+9-4
Original file line numberDiff line numberDiff line change
@@ -82,18 +82,23 @@ void dds_init(long long int timestamp, int bus_channel, int channel)
8282

8383
/* Compensation to keep phase continuity when switching from absolute or tracking
8484
* to continuous phase mode. */
85-
static unsigned int continuous_phase_comp[CONFIG_DDS_CHANNEL_COUNT];
85+
static unsigned int continuous_phase_comp[CONFIG_RTIO_DDS_COUNT][CONFIG_DDS_CHANNELS_PER_BUS];
8686

8787
static void dds_set_one(long long int now, long long int ref_time,
8888
int bus_channel, int channel,
8989
unsigned int ftw, unsigned int pow, int phase_mode, unsigned int amplitude)
9090
{
9191
unsigned int channel_enc;
9292

93-
if(channel >= CONFIG_DDS_CHANNEL_COUNT) {
93+
if((channel < 0) || (channel >= CONFIG_DDS_CHANNELS_PER_BUS)) {
9494
core_log("Attempted to set invalid DDS channel\n");
9595
return;
9696
}
97+
if((bus_channel < CONFIG_RTIO_FIRST_DDS_CHANNEL)
98+
|| (bus_channel >= (CONFIG_RTIO_FIRST_DDS_CHANNEL+CONFIG_RTIO_DDS_COUNT))) {
99+
core_log("Attempted to use invalid DDS bus\n");
100+
return;
101+
}
97102
#ifdef CONFIG_DDS_ONEHOT_SEL
98103
channel_enc = 1 << channel;
99104
#else
@@ -125,7 +130,7 @@ static void dds_set_one(long long int now, long long int ref_time,
125130
/* Disable autoclear phase accumulator and enables OSK. */
126131
DDS_WRITE(DDS_CFR1L, 0x0108);
127132
#endif
128-
pow += continuous_phase_comp[channel];
133+
pow += continuous_phase_comp[bus_channel-CONFIG_RTIO_FIRST_DDS_CHANNEL][channel];
129134
} else {
130135
long long int fud_time;
131136

@@ -141,7 +146,7 @@ static void dds_set_one(long long int now, long long int ref_time,
141146
pow -= (ref_time - fud_time)*CONFIG_DDS_RTIO_CLK_RATIO*ftw >> (32-DDS_POW_WIDTH);
142147
if(phase_mode == PHASE_MODE_TRACKING)
143148
pow += ref_time*CONFIG_DDS_RTIO_CLK_RATIO*ftw >> (32-DDS_POW_WIDTH);
144-
continuous_phase_comp[channel] = pow;
149+
continuous_phase_comp[bus_channel-CONFIG_RTIO_FIRST_DDS_CHANNEL][channel] = pow;
145150
}
146151

147152
#ifdef CONFIG_DDS_AD9858

‎artiq/runtime/test_mode.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -305,7 +305,7 @@ static void do_ddstest_one(unsigned int i)
305305
brg_ddswrite(bus_channel, DDS_FTWL, f & 0xffff);
306306
brg_ddswrite(bus_channel, DDS_FTWH, (f >> 16) & 0xffff);
307307
#endif
308-
brg_ddsfud();
308+
brg_ddsfud(bus_channel);
309309
#ifdef CONFIG_DDS_AD9858
310310
g = brg_ddsread(bus_channel, DDS_FTW0);
311311
g |= brg_ddsread(bus_channel, DDS_FTW1) << 8;

0 commit comments

Comments
 (0)
Please sign in to comment.