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base repository: m-labs/migen
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head repository: m-labs/migen
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compare: e45eaa45297d
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  • 2 commits
  • 1 file changed
  • 1 contributor

Commits on Mar 25, 2016

  1. fhdl/simplify/FullMemoryWE: fix typo

    @enjoy-digital
    enjoy-digital committed Mar 25, 2016
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    a8fd434 View commit details

  2. fhdl/simplify/MemoryToArray: remove false we_granularity limitation (… 

    …we_granularity is implemented and has been tested)
    @enjoy-digital
    enjoy-digital committed Mar 25, 2016
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    e45eaa4 View commit details
Showing with 2 additions and 4 deletions.
  1. +2 −4 migen/fhdl/simplify.py
6 changes: 2 additions & 4 deletions migen/fhdl/simplify.py
View file
Original file line number Diff line number Diff line change
@@ -6,7 +6,7 @@

class FullMemoryWE(ModuleTransformer):
def __init__(self):
self.replacments = dict()
self.replacements = dict()

def transform_fragment(self, i, f):
newspecials = set()
@@ -44,7 +44,7 @@ def transform_fragment(self, i, f):
clock_domain=port.clock.cd)
newmem.ports.append(newport)
newspecials.add(newport)
self.replacments[orig] = newmems
self.replacements[orig] = newmems

f.specials = newspecials

@@ -75,8 +75,6 @@ def transform_fragment(self, i, f):
storage.append(mem_storage)

for port in mem.ports:
if port.we_granularity:
raise NotImplementedError
try:
sync = f.sync[port.clock.cd]
except KeyError: