rtio/core: fix syntax

m-labs · Mar 9, 2016 · 3f8e431 · 3f8e431
1 parent 03b53c3
commit 3f8e431
Showing 1 changed file with 2 additions and 3 deletions.
diff --git a/artiq/gateware/rtio/core.py b/artiq/gateware/rtio/core.py
@@ -133,11 +133,10 @@ def __init__(self, interface, counter, fifo_depth, guard_io_cycles):
             # Note: replace may be asserted at the same time as collision
             # when addresses are different. In that case, it is a collision.
             self.sync.rsys += replace.eq(self.ev.timestamp == buf.timestamp)
-        self.sync.rsys += \
             # Detect sequence errors on coarse timestamps only
             # so that they are mutually exclusive with collision errors.
-            sequence_error.eq(self.ev.timestamp[fine_ts_width:]
-                              < buf.timestamp[fine_ts_width:])
+        self.sync.rsys += sequence_error.eq(self.ev.timestamp[fine_ts_width:] <
+                                            buf.timestamp[fine_ts_width:])
         if interface.enable_replace:
             if hasattr(self.ev, "a"):
                 different_addresses = self.ev.a != buf.a