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add has_dds, use config flags
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sbourdeauducq committed Nov 8, 2016
1 parent ec8fe6f commit 99ad9b5
Showing 3 changed files with 14 additions and 11 deletions.
12 changes: 7 additions & 5 deletions artiq/gateware/targets/kc705.py
Original file line number Diff line number Diff line change
@@ -137,6 +137,8 @@ def __init__(self, cpu_type="or1k", **kwargs):
self.register_kernel_cpu_csrdevice("i2c")
self.config["I2C_BUS_COUNT"] = 1

self.config["HAS_DDS"] = None

def add_rtio(self, rtio_channels):
self.submodules.rtio_crg = _RTIOCRG(self.platform, self.crg.cd_sys.clk)
self.csr_devices.append("rtio_crg")
@@ -198,7 +200,7 @@ def __init__(self, cpu_type="or1k", **kwargs):
self.config["RTIO_FIRST_DDS_CHANNEL"] = len(rtio_channels)
self.config["RTIO_DDS_COUNT"] = 1
self.config["DDS_CHANNELS_PER_BUS"] = 8
self.config["DDS_AD9858"] = True
self.config["DDS_AD9858"] = None
phy = dds.AD9858(platform.request("dds"), 8)
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy,
@@ -272,8 +274,8 @@ def __init__(self, cpu_type="or1k", **kwargs):
self.config["RTIO_FIRST_DDS_CHANNEL"] = len(rtio_channels)
self.config["RTIO_DDS_COUNT"] = 1
self.config["DDS_CHANNELS_PER_BUS"] = 11
self.config["DDS_AD9914"] = True
self.config["DDS_ONEHOT_SEL"] = True
self.config["DDS_AD9914"] = None
self.config["DDS_ONEHOT_SEL"] = None
phy = dds.AD9914(platform.request("dds"), 11, onehot=True)
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy,
@@ -350,8 +352,8 @@ def __init__(self, cpu_type="or1k", **kwargs):
self.config["RTIO_FIRST_DDS_CHANNEL"] = len(rtio_channels)
self.config["RTIO_DDS_COUNT"] = 2
self.config["DDS_CHANNELS_PER_BUS"] = 12
self.config["DDS_AD9914"] = True
self.config["DDS_ONEHOT_SEL"] = True
self.config["DDS_AD9914"] = None
self.config["DDS_ONEHOT_SEL"] = None
for backplane_offset in range(2):
phy = dds.AD9914(
platform.request("dds", backplane_offset), 12, onehot=True)
3 changes: 2 additions & 1 deletion artiq/gateware/targets/pipistrello.py
Original file line number Diff line number Diff line change
@@ -206,10 +206,11 @@ def __init__(self, cpu_type="or1k", **kwargs):
rtio_channels.append(rtio.Channel.from_phy(
phy, ofifo_depth=64, ififo_depth=64))

self.config["HAS_DDS"] = None
self.config["RTIO_FIRST_DDS_CHANNEL"] = len(rtio_channels)
self.config["RTIO_DDS_COUNT"] = 1
self.config["DDS_CHANNELS_PER_BUS"] = 8
self.config["DDS_AD9858"] = True
self.config["DDS_AD9858"] = None
dds_pins = platform.request("dds")
self.comb += dds_pins.p.eq(0)
phy = dds.AD9858(dds_pins, 8)
10 changes: 5 additions & 5 deletions artiq/runtime.rs/libksupport/api.rs
Original file line number Diff line number Diff line change
@@ -105,15 +105,15 @@ static mut API: &'static [(&'static str, *const ())] = &[
api!(rtio_input_timestamp),
api!(rtio_input_data),

#[cfg(has_rtio_dds_count)]
#[cfg(has_dds)]
api!(dds_init),
#[cfg(has_rtio_dds_count)]
#[cfg(has_dds)]
api!(dds_init_sync),
#[cfg(has_rtio_dds_count)]
#[cfg(has_dds)]
api!(dds_batch_enter),
#[cfg(has_rtio_dds_count)]
#[cfg(has_dds)]
api!(dds_batch_exit),
#[cfg(has_rtio_dds_count)]
#[cfg(has_dds)]
api!(dds_set),

api!(i2c_init),

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