m-labs · Mar 28, 2016 · Mar 28, 2016 · Mar 28, 2016
diff --git a/artiq/compiler/asttyped.py b/artiq/compiler/asttyped.py
@@ -30,7 +30,9 @@ class ClassDefT(ast.ClassDef):
 class FunctionDefT(ast.FunctionDef, scoped):
     _types = ("signature_type",)
 class QuotedFunctionDefT(FunctionDefT):
-    pass
+    """
+    :ivar flags: (set of str) Code generation flags (see :class:`ir.Function`).
+    """
 class ModuleT(ast.Module, scoped):
     pass
 

diff --git a/artiq/compiler/embedding.py b/artiq/compiler/embedding.py
@@ -546,7 +546,7 @@ def _synthesizer(self, expanded_from=None):
                               value_map=self.value_map,
                               quote_function=self._quote_function)
 
-    def _quote_embedded_function(self, function):
+    def _quote_embedded_function(self, function, flags):
         if not hasattr(function, "artiq_embedded"):
             raise ValueError("{} is not an embedded function".format(repr(function)))
 
@@ -596,6 +596,7 @@ def _quote_embedded_function(self, function):
             globals=self.globals, host_environment=host_environment,
             quote=self._quote)
         function_node = asttyped_rewriter.visit_quoted_function(function_node, embedded_function)
+        function_node.flags = flags
 
         # Add it into our typedtree so that it gets inferenced and codegen'd.
         self._inject(function_node)
@@ -774,7 +775,8 @@ def _quote_function(self, function, loc):
                             notes=[note])
                         self.engine.process(diag)
 
-                    self._quote_embedded_function(function)
+                    self._quote_embedded_function(function,
+                                                  flags=function.artiq_embedded.flags)
                 elif function.artiq_embedded.syscall is not None:
                     # Insert a storage-less global whose type instructs the compiler
                     # to perform a system call instead of a regular call.

diff --git a/artiq/compiler/ir.py b/artiq/compiler/ir.py
@@ -425,6 +425,8 @@ class Function:
         the module it is contained in
     :ivar is_cold:
         (bool) if True, the function should be considered rarely called
+    :ivar flags: (set of str) Code generation flags.
+        Flag ``fast-math`` is the equivalent of gcc's ``-ffast-math``.
     """
 
     def __init__(self, typ, name, arguments, loc=None):
@@ -434,6 +436,7 @@ def __init__(self, typ, name, arguments, loc=None):
         self.set_arguments(arguments)
         self.is_internal = False
         self.is_cold = False
+        self.flags = {}
 
     def _remove_name(self, name):
         self.names.remove(name)

diff --git a/artiq/compiler/transforms/artiq_ir_generator.py b/artiq/compiler/transforms/artiq_ir_generator.py
@@ -224,7 +224,8 @@ def visit_ClassDefT(self, node):
         finally:
             self.current_class = old_class
 
-    def visit_function(self, node, is_lambda=False, is_internal=False, is_quoted=False):
+    def visit_function(self, node, is_lambda=False, is_internal=False, is_quoted=False,
+                       flags={}):
         if is_lambda:
             name = "lambda@{}:{}".format(node.loc.line(), node.loc.column())
             typ = node.type.find()
@@ -270,6 +271,7 @@ def codegen_default(default_node):
             func = ir.Function(typ, ".".join(self.name), [env_arg] + args + optargs,
                                loc=node.lambda_loc if is_lambda else node.keyword_loc)
             func.is_internal = is_internal
+            func.flags = flags
             self.functions.append(func)
             old_func, self.current_function = self.current_function, func
 
@@ -336,7 +338,7 @@ def visit_FunctionDefT(self, node):
             self.append(ir.SetAttr(self.current_class, node.name, func))
 
     def visit_QuotedFunctionDefT(self, node):
-        self.visit_function(node, is_internal=True, is_quoted=True)
+        self.visit_function(node, is_internal=True, is_quoted=True, flags=node.flags)
 
     def visit_Return(self, node):
         if node.value is None:

diff --git a/artiq/compiler/transforms/inferencer.py b/artiq/compiler/transforms/inferencer.py
@@ -846,6 +846,10 @@ def makenotes(printer, typea, typeb, loca, locb):
             # An user-defined class.
             self._unify(node.type, typ.find().instance,
                         node.loc, None)
+        elif types.is_builtin(typ, "kernel"):
+            # Ignored.
+            self._unify(node.type, builtins.TNone(),
+                        node.loc, None)
         else:
             assert False
 
@@ -1188,7 +1192,9 @@ def visit_arguments(self, node):
 
     def visit_FunctionDefT(self, node):
         for index, decorator in enumerate(node.decorator_list):
-            if types.is_builtin(decorator.type, "kernel"):
+            if types.is_builtin(decorator.type, "kernel") or \
+                    isinstance(decorator, asttyped.CallT) and \
+                    types.is_builtin(decorator.func.type, "kernel"):
                 continue
 
             diag = diagnostic.Diagnostic("error",

diff --git a/artiq/compiler/transforms/llvm_ir_generator.py b/artiq/compiler/transforms/llvm_ir_generator.py
@@ -175,6 +175,7 @@ def __init__(self, engine, module_name, target, function_map, object_map, type_m
         self.llmodule = ll.Module(context=self.llcontext, name=module_name)
         self.llmodule.triple = target.triple
         self.llmodule.data_layout = target.data_layout
+        self.function_flags = None
         self.llfunction = None
         self.llmap = {}
         self.llobject_map = {}
@@ -562,6 +563,7 @@ def rpc_tag_error(typ):
 
     def process_function(self, func):
         try:
+            self.function_flags = func.flags
             self.llfunction = self.map(func)
 
             if func.is_internal:
@@ -617,6 +619,7 @@ def process_function(self, func):
                 for value, block in phi.incoming():
                     llphi.add_incoming(self.map(value), llblock_map[block])
         finally:
+            self.function_flags = None
             self.llfunction = None
             self.llmap = {}
             self.phis = []
@@ -863,40 +866,55 @@ def process_Coerce(self, insn):
         else:
             assert False
 
+    def add_fast_math_flags(self, llvalue):
+        if 'fast-math' in self.function_flags:
+            llvalue.opname = llvalue.opname + ' fast'
+
     def process_Arith(self, insn):
         if isinstance(insn.op, ast.Add):
             if builtins.is_float(insn.type):
-                return self.llbuilder.fadd(self.map(insn.lhs()), self.map(insn.rhs()),
-                                           name=insn.name)
+                llvalue = self.llbuilder.fadd(self.map(insn.lhs()), self.map(insn.rhs()),
+                                              name=insn.name)
+                self.add_fast_math_flags(llvalue)
+                return llvalue
             else:
                 return self.llbuilder.add(self.map(insn.lhs()), self.map(insn.rhs()),
                                           name=insn.name)
         elif isinstance(insn.op, ast.Sub):
             if builtins.is_float(insn.type):
-                return self.llbuilder.fsub(self.map(insn.lhs()), self.map(insn.rhs()),
-                                           name=insn.name)
+                llvalue = self.llbuilder.fsub(self.map(insn.lhs()), self.map(insn.rhs()),
+                                              name=insn.name)
+                self.add_fast_math_flags(llvalue)
+                return llvalue
             else:
                 return self.llbuilder.sub(self.map(insn.lhs()), self.map(insn.rhs()),
                                           name=insn.name)
         elif isinstance(insn.op, ast.Mult):
             if builtins.is_float(insn.type):
-                return self.llbuilder.fmul(self.map(insn.lhs()), self.map(insn.rhs()),
-                                           name=insn.name)
+                llvalue = self.llbuilder.fmul(self.map(insn.lhs()), self.map(insn.rhs()),
+                                              name=insn.name)
+                self.add_fast_math_flags(llvalue)
+                return llvalue
             else:
                 return self.llbuilder.mul(self.map(insn.lhs()), self.map(insn.rhs()),
                                           name=insn.name)
         elif isinstance(insn.op, ast.Div):
             if builtins.is_float(insn.lhs().type):
-                return self.llbuilder.fdiv(self.map(insn.lhs()), self.map(insn.rhs()),
-                                           name=insn.name)
+                llvalue = self.llbuilder.fdiv(self.map(insn.lhs()), self.map(insn.rhs()),
+                                              name=insn.name)
+                self.add_fast_math_flags(llvalue)
+                return llvalue
             else:
                 lllhs = self.llbuilder.sitofp(self.map(insn.lhs()), self.llty_of_type(insn.type))
                 llrhs = self.llbuilder.sitofp(self.map(insn.rhs()), self.llty_of_type(insn.type))
-                return self.llbuilder.fdiv(lllhs, llrhs,
-                                           name=insn.name)
+                llvalue = self.llbuilder.fdiv(lllhs, llrhs,
+                                              name=insn.name)
+                self.add_fast_math_flags(llvalue)
+                return llvalue
         elif isinstance(insn.op, ast.FloorDiv):
             if builtins.is_float(insn.type):
                 llvalue = self.llbuilder.fdiv(self.map(insn.lhs()), self.map(insn.rhs()))
+                self.add_fast_math_flags(llvalue)
                 return self.llbuilder.call(self.llbuiltin("llvm.floor.f64"), [llvalue],
                                            name=insn.name)
             else:
@@ -906,6 +924,7 @@ def process_Arith(self, insn):
             # Python only has the modulo operator, LLVM only has the remainder
             if builtins.is_float(insn.type):
                 llvalue = self.llbuilder.frem(self.map(insn.lhs()), self.map(insn.rhs()))
+                self.add_fast_math_flags(llvalue)
                 return self.llbuilder.call(self.llbuiltin("llvm.copysign.f64"),
                                            [llvalue, self.map(insn.rhs())],
                                            name=insn.name)
@@ -1298,19 +1317,20 @@ def process_Call(self, insn):
         return llresult
 
     def process_Invoke(self, insn):
+        functiontyp = insn.target_function().type
         llnormalblock = self.map(insn.normal_target())
         llunwindblock = self.map(insn.exception_target())
-        if types.is_rpc_function(insn.target_function().type):
+        if types.is_rpc_function(functiontyp):
             return self._build_rpc(insn.target_function().loc,
-                                   insn.target_function().type,
+                                   functiontyp,
                                    insn.arguments(),
                                    llnormalblock, llunwindblock)
-        elif types.is_c_function(insn.target_function().type):
+        elif types.is_c_function(functiontyp):
             llfun, llargs = self._prepare_ffi_call(insn)
         else:
             llfun, llargs = self._prepare_closure_call(insn)
 
-        if self.has_sret(insn.target_function().type):
+        if self.has_sret(functiontyp):
             llstackptr = self.llbuilder.call(self.llbuiltin("llvm.stacksave"), [])
 
             llresultslot = self.llbuilder.alloca(llfun.type.pointee.args[0].pointee)
@@ -1323,6 +1343,10 @@ def process_Invoke(self, insn):
             llcall = self.llbuilder.invoke(llfun, llargs, llnormalblock, llunwindblock,
                                            name=insn.name)
 
+            # See the comment in process_Call.
+            if types.is_c_function(functiontyp) and 'nowrite' in functiontyp.flags:
+                llcall.metadata['tbaa'] = self.tbaa_nowrite_call
+
         if insn.is_cold:
             llcall.cconv = 'coldcc'
 

diff --git a/artiq/compiler/types.py b/artiq/compiler/types.py
@@ -351,6 +351,7 @@ class TCFunction(TFunction):
     attributes = OrderedDict()
 
     def __init__(self, args, ret, name, flags={}):
+        assert isinstance(flags, set)
         for flag in flags:
             assert flag in {'nounwind', 'nowrite'}
         super().__init__(args, OrderedDict(), ret)

diff --git a/artiq/coredevice/cache.py b/artiq/coredevice/cache.py
@@ -2,11 +2,11 @@
 from artiq.language.types import *
 
 
-@syscall("cache_get", flags={"nounwind", "nowrite"})
+@syscall(flags={"nounwind", "nowrite"})
 def cache_get(key: TStr) -> TList(TInt32):
     raise NotImplementedError("syscall not simulated")
 
-@syscall("cache_put", flags={"nowrite"})
+@syscall(flags={"nowrite"})
 def cache_put(key: TStr, value: TList(TInt32)) -> TNone:
     raise NotImplementedError("syscall not simulated")
 

diff --git a/artiq/coredevice/core.py b/artiq/coredevice/core.py
@@ -37,7 +37,7 @@ def __str__(self):
         return "\n" + _render_diagnostic(self.diagnostic, colored=colors_supported)
 
 
-@syscall("rtio_get_counter", flags={"nounwind", "nowrite"})
+@syscall(flags={"nounwind", "nowrite"})
 def rtio_get_counter() -> TInt64:
     raise NotImplementedError("syscall not simulated")
 

diff --git a/artiq/coredevice/dds.py b/artiq/coredevice/dds.py
@@ -10,20 +10,20 @@
 PHASE_MODE_TRACKING = 2
 
 
-@syscall("dds_init", flags={"nowrite"})
+@syscall(flags={"nowrite"})
 def dds_init(time_mu: TInt64, bus_channel: TInt32, channel: TInt32) -> TNone:
     raise NotImplementedError("syscall not simulated")
 
-@syscall("dds_set", flags={"nowrite"})
+@syscall(flags={"nowrite"})
 def dds_set(time_mu: TInt64, bus_channel: TInt32, channel: TInt32, ftw: TInt32,
             pow: TInt32, phase_mode: TInt32, amplitude: TInt32) -> TNone:
     raise NotImplementedError("syscall not simulated")
 
-@syscall("dds_batch_enter", flags={"nowrite"})
+@syscall(flags={"nowrite"})
 def dds_batch_enter(time_mu: TInt64) -> TNone:
     raise NotImplementedError("syscall not simulated")
 
-@syscall("dds_batch_exit", flags={"nowrite"})
+@syscall(flags={"nowrite"})
 def dds_batch_exit() -> TNone:
     raise NotImplementedError("syscall not simulated")
 
@@ -99,27 +99,27 @@ def __init__(self, dmgr, bus_channel, channel, core_dds_device="core_dds"):
         self.channel = channel
         self.phase_mode = PHASE_MODE_CONTINUOUS
 
-    @portable
+    @portable(flags=["fast-math"])
     def frequency_to_ftw(self, frequency):
         """Returns the frequency tuning word corresponding to the given
         frequency.
         """
         return round(int(2, width=64)**32*frequency/self.core_dds.sysclk)
 
-    @portable
+    @portable(flags=["fast-math"])
     def ftw_to_frequency(self, ftw):
         """Returns the frequency corresponding to the given frequency tuning
         word.
         """
         return ftw*self.core_dds.sysclk/int(2, width=64)**32
 
-    @portable
+    @portable(flags=["fast-math"])
     def turns_to_pow(self, turns):
         """Returns the phase offset word corresponding to the given phase
         in turns."""
         return round(turns*2**self.pow_width)
 
-    @portable
+    @portable(flags=["fast-math"])
     def pow_to_turns(self, pow):
         """Returns the phase in turns corresponding to the given phase offset
         word."""

diff --git a/artiq/coredevice/i2c.py b/artiq/coredevice/i2c.py
@@ -3,27 +3,27 @@
 from artiq.coredevice.exceptions import I2CError
 
 
-@syscall("i2c_init", flags={"nowrite"})
+@syscall(flags={"nowrite"})
 def i2c_init(busno: TInt32) -> TNone:
     raise NotImplementedError("syscall not simulated")
 
 
-@syscall("i2c_start", flags={"nounwind", "nowrite"})
+@syscall(flags={"nounwind", "nowrite"})
 def i2c_start(busno: TInt32) -> TNone:
     raise NotImplementedError("syscall not simulated")
 
 
-@syscall("i2c_stop", flags={"nounwind", "nowrite"})
+@syscall(flags={"nounwind", "nowrite"})
 def i2c_stop(busno: TInt32) -> TNone:
     raise NotImplementedError("syscall not simulated")
 
 
-@syscall("i2c_write", flags={"nounwind", "nowrite"})
+@syscall(flags={"nounwind", "nowrite"})
 def i2c_write(busno: TInt32, b: TInt32) -> TBool:
     raise NotImplementedError("syscall not simulated")
 
 
-@syscall("i2c_read", flags={"nounwind", "nowrite"})
+@syscall(flags={"nounwind", "nowrite"})
 def i2c_read(busno: TInt32, ack: TBool) -> TInt32:
     raise NotImplementedError("syscall not simulated")
 

diff --git a/artiq/coredevice/rtio.py b/artiq/coredevice/rtio.py
@@ -2,17 +2,17 @@
 from artiq.language.types import TInt64, TInt32, TNone
 
 
-@syscall("rtio_output", flags={"nowrite"})
+@syscall(flags={"nowrite"})
 def rtio_output(time_mu: TInt64, channel: TInt32, addr: TInt32, data: TInt32
                 ) -> TNone:
     raise NotImplementedError("syscall not simulated")
 
 
-@syscall("rtio_input_timestamp", flags={"nowrite"})
+@syscall(flags={"nowrite"})
 def rtio_input_timestamp(timeout_mu: TInt64, channel: TInt32) -> TInt64:
     raise NotImplementedError("syscall not simulated")
 
 
-@syscall("rtio_input_data", flags={"nowrite"})
+@syscall(flags={"nowrite"})
 def rtio_input_data(channel: TInt32) -> TInt32:
     raise NotImplementedError("syscall not simulated")