Adding the minispartan6+ board in a mostly working state #249
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…r needed, in USBSoC UART is now transmitted over USB)
We don't have room in the LX25 for the firmware. Instead we will load it at run time from serial or flash. Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The ms6+ RAM lives at 0x40000000 and this is where we want to load our firmware. Signed-off-by: Joel Stanley <joel@jms.id.au>
Monkey patch the get_linker_regions script to create the alias.
* They where conflicting with the firmware. * Created timvideos#250 about this problem.
While the minispartan6 only has SDRAM, we'll call it DDR so it can share code.
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@shenki This pull request is ready to be looked at. I think we should aim to get it merged ASAP. |
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LGTM. Merge away! |
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…rty/liteeth-f2b3f7e build(deps): bump third_party/liteeth from `4d9e74f` to `f2b3f7e`
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This pull request adds basic support for the minispartan6+ board. The following features work;
This support is pretty comparable to the current pipistrello support and should be enough for some basic development and testing.