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Commit dcea3ae

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committedJul 7, 2017
Fixed several bugs in XC2C emulator. Now runs a more complex blinky bitstream correctly.
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3 files changed

+19
-8
lines changed

3 files changed

+19
-8
lines changed
 

‎hdl/xc2c-model/XC2CAndArray.v

+2-2
Original file line numberDiff line numberDiff line change
@@ -55,9 +55,9 @@ module XC2CAndArray(zia_in, config_bits, pterm_out);
5555
//AND in the ZIA stuff
5656
for(nrow=0; nrow<40; nrow=nrow+1) begin
5757
if(!and_config[nterm][nrow*2])
58-
pterm_out[nterm] = pterm_out[nterm] & ~zia_in[nrow];
59-
if(!and_config[nterm][nrow*2 + 1])
6058
pterm_out[nterm] = pterm_out[nterm] & zia_in[nrow];
59+
if(!and_config[nterm][nrow*2 + 1])
60+
pterm_out[nterm] = pterm_out[nterm] & ~zia_in[nrow];
6161
end
6262
end
6363
end

‎hdl/xc2c-model/XC2CBitstream.v

+4-4
Original file line numberDiff line numberDiff line change
@@ -203,11 +203,11 @@ module XC2CBitstream(
203203
//One bit per product term, two OR terms per row
204204
if( (row >= 20) && (row <= 27) ) begin
205205
for(nterm=0; nterm<56; nterm=nterm+1) begin
206-
right_or_config[(orow*2)*56 + nterm] <= ram_bitstream[orow][249 - nterm*2 - 0];
207-
right_or_config[(orow*2+1)*56 + nterm] <= ram_bitstream[orow][249 - nterm*2 - 1];
206+
right_or_config[(orow*2)*56 + nterm] <= ram_bitstream[row][249 - nterm*2 - 1];
207+
right_or_config[(orow*2+1)*56 + nterm] <= ram_bitstream[row][249 - nterm*2 - 0];
208208

209-
left_or_config[(orow*2)*56 + nterm] <= ram_bitstream[orow][10 + nterm*2 + 0];
210-
left_or_config[(orow*2+1)*56 + nterm] <= ram_bitstream[orow][10 + nterm*2 + 1];
209+
left_or_config[(orow*2)*56 + nterm] <= ram_bitstream[row][10 + nterm*2 + 0];
210+
left_or_config[(orow*2+1)*56 + nterm] <= ram_bitstream[row][10 + nterm*2 + 1];
211211
end
212212
end
213213

‎hdl/xc2c-model/XC2CJTAG.v

+13-2
Original file line numberDiff line numberDiff line change
@@ -238,6 +238,7 @@ module XC2CJTAG(
238238

239239
reg[7:0] ir = INST_IDCODE;
240240
reg[7:0] ir_shreg = 0;
241+
reg programming = 0;
241242

242243
//Instruction loading and capture
243244
always @(posedge tck) begin
@@ -275,20 +276,30 @@ module XC2CJTAG(
275276
//TODO: support OTF mode
276277
if(ir_shreg == INST_ISC_ENABLE)
277278
isc_enabled <= 1;
278-
if(ir_shreg == INST_ISC_DISABLE)
279+
if(ir_shreg == INST_ISC_DISABLE) begin
280+
programming <= 0;
279281
isc_enabled <= 0;
282+
end
280283

281284
//Wipe config memory when we get an ERASE instruction
282285
if(ir_shreg == INST_ISC_ERASE) begin
283286
config_erase <= 1;
284287
configured <= 0;
285288
end
286289

287-
//DEBUG: declare us configured as soon as we get a PROGRAM instruction
290+
//Declare us to be programming when we load ISC_PROGRAM
288291
//TODO: check DONE / transfer bits first
289292
if(ir_shreg == INST_ISC_PROGRAM) begin
293+
programming <= 1;
294+
end
295+
296+
//If we leave programming mode after programming, set us to be done and reset everything
297+
if(ir_shreg == INST_ISC_DISABLE && programming) begin
290298
configured <= 1;
291299
config_done_rst <= 1;
300+
`ifdef XILINX_ISIM
301+
$display("Configuration complete");
302+
`endif
292303
end
293304

294305
//TODO: copy EEPROM to RAM when we get an ISC_INIT command

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