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Fixed several bugs in XC2C emulator. Now runs a more complex blinky b…
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…itstream correctly.
azonenberg committed Jul 7, 2017
1 parent 1836f52 commit dcea3ae
Showing 3 changed files with 19 additions and 8 deletions.
4 changes: 2 additions & 2 deletions hdl/xc2c-model/XC2CAndArray.v
Original file line number Diff line number Diff line change
@@ -55,9 +55,9 @@ module XC2CAndArray(zia_in, config_bits, pterm_out);
//AND in the ZIA stuff
for(nrow=0; nrow<40; nrow=nrow+1) begin
if(!and_config[nterm][nrow*2])
pterm_out[nterm] = pterm_out[nterm] & ~zia_in[nrow];
if(!and_config[nterm][nrow*2 + 1])
pterm_out[nterm] = pterm_out[nterm] & zia_in[nrow];
if(!and_config[nterm][nrow*2 + 1])
pterm_out[nterm] = pterm_out[nterm] & ~zia_in[nrow];
end
end
end
8 changes: 4 additions & 4 deletions hdl/xc2c-model/XC2CBitstream.v
Original file line number Diff line number Diff line change
@@ -203,11 +203,11 @@ module XC2CBitstream(
//One bit per product term, two OR terms per row
if( (row >= 20) && (row <= 27) ) begin
for(nterm=0; nterm<56; nterm=nterm+1) begin
right_or_config[(orow*2)*56 + nterm] <= ram_bitstream[orow][249 - nterm*2 - 0];
right_or_config[(orow*2+1)*56 + nterm] <= ram_bitstream[orow][249 - nterm*2 - 1];
right_or_config[(orow*2)*56 + nterm] <= ram_bitstream[row][249 - nterm*2 - 1];
right_or_config[(orow*2+1)*56 + nterm] <= ram_bitstream[row][249 - nterm*2 - 0];

left_or_config[(orow*2)*56 + nterm] <= ram_bitstream[orow][10 + nterm*2 + 0];
left_or_config[(orow*2+1)*56 + nterm] <= ram_bitstream[orow][10 + nterm*2 + 1];
left_or_config[(orow*2)*56 + nterm] <= ram_bitstream[row][10 + nterm*2 + 0];
left_or_config[(orow*2+1)*56 + nterm] <= ram_bitstream[row][10 + nterm*2 + 1];
end
end

15 changes: 13 additions & 2 deletions hdl/xc2c-model/XC2CJTAG.v
Original file line number Diff line number Diff line change
@@ -238,6 +238,7 @@ module XC2CJTAG(

reg[7:0] ir = INST_IDCODE;
reg[7:0] ir_shreg = 0;
reg programming = 0;

//Instruction loading and capture
always @(posedge tck) begin
@@ -275,20 +276,30 @@ module XC2CJTAG(
//TODO: support OTF mode
if(ir_shreg == INST_ISC_ENABLE)
isc_enabled <= 1;
if(ir_shreg == INST_ISC_DISABLE)
if(ir_shreg == INST_ISC_DISABLE) begin
programming <= 0;
isc_enabled <= 0;
end

//Wipe config memory when we get an ERASE instruction
if(ir_shreg == INST_ISC_ERASE) begin
config_erase <= 1;
configured <= 0;
end

//DEBUG: declare us configured as soon as we get a PROGRAM instruction
//Declare us to be programming when we load ISC_PROGRAM
//TODO: check DONE / transfer bits first
if(ir_shreg == INST_ISC_PROGRAM) begin
programming <= 1;
end

//If we leave programming mode after programming, set us to be done and reset everything
if(ir_shreg == INST_ISC_DISABLE && programming) begin
configured <= 1;
config_done_rst <= 1;
`ifdef XILINX_ISIM
$display("Configuration complete");
`endif
end

//TODO: copy EEPROM to RAM when we get an ISC_INIT command

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