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Commit 1d910aa

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committedJun 24, 2017
Timing analyzer is now aware of which cells are stateful, and won't report false combinatorial loops for stateful logic. No timing data for these blocks yet, though.
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3 files changed

+26
-3
lines changed

3 files changed

+26
-3
lines changed
 

Diff for: ‎src/gp4par/par_reporting.cpp

+2-3
Original file line numberDiff line numberDiff line change
@@ -264,8 +264,7 @@ void PrintTimingReport(Greenpak4Netlist* netlist, Greenpak4Device* device)
264264
{
265265
auto cell = it->second;
266266

267-
//TODO: check stateful internal blocks too
268-
if(!cell->IsIbuf())
267+
if(!cell->IsIbuf() && !cell->IsStateful())
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continue;
270269
sources.emplace(cell);
271270
}
@@ -278,7 +277,7 @@ void PrintTimingReport(Greenpak4Netlist* netlist, Greenpak4Device* device)
278277
auto cell = it->second;
279278

280279
//TODO: check stateful internal blocks too
281-
if(!cell->IsObuf())
280+
if(!cell->IsObuf() && !cell->IsStateful())
282281
continue;
283282
sinks.emplace(cell);
284283
}

Diff for: ‎src/greenpak4/Greenpak4NetlistCell.cpp

+21
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,9 @@ Greenpak4NetlistCell::~Greenpak4NetlistCell()
2929
//do not delete wires, module dtor handles that
3030
}
3131

32+
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
33+
// Accessors
34+
3235
string Greenpak4NetlistCell::GetLOC()
3336
{
3437
string loc = m_attributes.at("LOC");
@@ -98,3 +101,21 @@ string Greenpak4NetlistCell::GetLOC()
98101
else
99102
return loc;
100103
}
104+
105+
bool Greenpak4NetlistCell::IsStateful()
106+
{
107+
if(m_type.find("GP_COUNT") == 0)
108+
return true;
109+
if(m_type.find("GP_DFF") == 0)
110+
return true;
111+
if(m_type.find("GP_DLATCH") == 0)
112+
return true;
113+
if(m_type == "GP_PGEN")
114+
return true;
115+
if(m_type.find("GP_SHREG") == 0)
116+
return true;
117+
if(m_type.find("GP_SPI") == 0)
118+
return true;
119+
120+
return false;
121+
}

Diff for: ‎src/greenpak4/Greenpak4NetlistCell.h

+3
Original file line numberDiff line numberDiff line change
@@ -66,6 +66,9 @@ class Greenpak4NetlistCell : public Greenpak4NetlistEntity
6666
bool IsPowerRail()
6767
{ return (m_type == "GP_VDD") || (m_type == "GP_VSS"); }
6868

69+
//Indicates whether the cell is stateful (can start or end a combinatorial path)
70+
bool IsStateful();
71+
6972
std::string GetLOC();
7073

7174
bool HasLOC()

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