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Updated README, reviving this project
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azonenberg committed Jul 7, 2017
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Copyright (c) 2015, Andrew Zonenberg
Copyright (c) 2015-2017, Andrew Zonenberg
All rights reserved.

Redistribution and use in source and binary forms, with or without
3 changes: 2 additions & 1 deletion README.md
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# netlist-tools
Automated analysis tools for turning reverse-engineered IC bitmaps (from a machine vision tool) into transistor-level (and eventually gate level) netlists. Very early prototype as well as my first Python3 project, do not expect this to work!
Automated analysis tools for turning gate-level netlists from FPGA bitstreams, machine vision tools, etc into
high-level RTL netlists.

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