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  • 6 commits
  • 6 files changed
  • 1 contributor

Commits on Oct 15, 2016

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Showing with 102 additions and 5 deletions.
  1. +6 −2 doc/gp4-hdl.tex
  2. +5 −0 src/gp4prog/main.cpp
  3. +1 −0 src/greenpak4/Greenpak4DAC.cpp
  4. +1 −0 tests/greenpak4/CMakeLists.txt
  5. +35 −3 tests/greenpak4/Dac.v
  6. +54 −0 tests/greenpak4/Delay.v
8 changes: 6 additions & 2 deletions doc/gp4-hdl.tex
Original file line number Diff line number Diff line change
@@ -1677,7 +1677,7 @@ \subsubsection{Verilog Usage Example}
% GP_DELAY

\pagebreak
\subsection{\tokenstyle{GP\_DELAY}: Programmable Digital Delay Line (NOT IMPLEMENTED)}
\subsection{\tokenstyle{GP\_DELAY}: Programmable Digital Delay Line}
\label{gp-delay}

\subsubsection{Introduction}
@@ -1708,10 +1708,14 @@ \subsubsection{Parameter Descriptions}

\subsubsection{Verilog Usage Example}

The example shown in figure \ref{gp-delay-example} FIXME.
The example shown in figure \ref{gp-delay-example} shows a delay with a nominal value of 110 ns at 3.3V Vdd.

\begin{figure}[h]
\begin{lstlisting}
GP_DELAY #(.DELAY_STEPS(1)) delay(
.IN(clk),
.OUT(clk_delayed)
);
\end{lstlisting}
\caption{Example usage of \tokenstyle{GP\_DELAY}}
\label{gp-delay-example}
5 changes: 5 additions & 0 deletions src/gp4prog/main.cpp
Original file line number Diff line number Diff line change
@@ -309,6 +309,8 @@ int main(int argc, char* argv[])
if(!(uploadFilename.empty() && downloadFilename.empty() && rcOscFreq == 0 && !test && !programNvram)) {
//Detect the part that's plugged in.
LogNotice("Detecting part\n");
LogIndenter li;

SilegoPart parts[] = { SLG46140V, SLG46620V };
for(SilegoPart part : parts) {
LogVerbose("Selecting part %s\n", PartName(part));
@@ -394,6 +396,7 @@ int main(int argc, char* argv[])
}

LogNotice("Trimming oscillator for %d Hz at %.3g V\n", rcOscFreq, voltage);
LogIndenter li;
rcFtw = TrimOscillator(hdev, detectedPart, voltage, rcOscFreq);
}

@@ -423,10 +426,12 @@ int main(int argc, char* argv[])
if(!programNvram) {
//Load bitstream into SRAM
LogNotice("Downloading bitstream into SRAM\n");
LogIndenter li;
DownloadBitstream(hdev, newBitstream, DownloadMode::EMULATION);
} else {
//Program bitstream into NVM
LogNotice("Programming bitstream into NVM\n");
LogIndenter li;
DownloadBitstream(hdev, newBitstream, DownloadMode::PROGRAMMING);

LogNotice("Verifying programmed bitstream\n");
1 change: 1 addition & 0 deletions src/greenpak4/Greenpak4DAC.cpp
Original file line number Diff line number Diff line change
@@ -138,6 +138,7 @@ bool Greenpak4DAC::Save(bool* bitstream)

//VREF must be from a GP_VREF driving 1v0 for now
//Sanity check that
//TODO: DAC1 has a 50 mV offset, so the two are NOT equivalent!
if(!m_vref.IsVoltageReference())
{
LogError("DRC: DAC should have a voltage reference driving VREF, but something else was supplied instead\n");
1 change: 1 addition & 0 deletions tests/greenpak4/CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -24,6 +24,7 @@ endfunction()
add_greenpak4_test(Bargraph)
add_greenpak4_test(Blinky)
add_greenpak4_test(Dac)
add_greenpak4_test(Delay)
add_greenpak4_test(Inverters)
add_greenpak4_test(Location)
add_greenpak4_test(PGA)
38 changes: 35 additions & 3 deletions tests/greenpak4/Dac.v
Original file line number Diff line number Diff line change
@@ -22,11 +22,12 @@
OUTPUTS:
Bandgap OK on pin 20 (should be high after reset)
DAC output on pin 19 (sweeping TBD)
DAC output on pin 18 (constant 1V)
TEST PROCEDURE:
TODO
*/
module Dac(bg_ok, vout, vout2);
module Dac(bg_ok, vout, vout2, wave_sync);

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// I/O declarations
@@ -42,6 +43,9 @@ module Dac(bg_ok, vout, vout2);
(* IBUF_TYPE = "ANALOG" *)
output wire vout2;

(* LOC = "P17" *)
output wire wave_sync;

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// System reset stuff

@@ -56,6 +60,17 @@ module Dac(bg_ok, vout, vout2);
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// Oscillators

//The 1730 Hz oscillator
wire clk_108hz;
GP_LFOSC #(
.PWRDN_EN(0),
.AUTO_PWRDN(0),
.OUT_DIV(16)
) lfosc (
.PWRDN(1'b0),
.CLKOUT(clk_108hz)
);

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// 1.0V voltage reference for the DAC

@@ -78,14 +93,31 @@ module Dac(bg_ok, vout, vout2);
.VOUT(vref_1v0)
);

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// A counter running off the 108 Hz clock

localparam COUNT_MAX = 255;

(* LOC = "COUNT8_6" *)
(* COUNT_EXTRACT = "FORCE" *)
reg[7:0] count = COUNT_MAX;
always @(posedge clk_108hz) begin
if(count == 0)
count <= COUNT_MAX;
else
count <= count - 1'd1;
end

//Counter overflow signal to LED
assign wave_sync = (count == 0);

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// DAC driving the voltage reference

//This DAC isn't working! Not sure why
wire vdac;
(* LOC = "DAC_1" *)
GP_DAC dac(
.DIN(8'hff),
.DIN(8'hff), //count
.VOUT(vdac),
.VREF(vref_1v0)
);
54 changes: 54 additions & 0 deletions tests/greenpak4/Delay.v
Original file line number Diff line number Diff line change
@@ -0,0 +1,54 @@
/***********************************************************************************************************************
* Copyright (C) 2016 Andrew Zonenberg and contributors *
* *
* This program is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General *
* Public License as published by the Free Software Foundation; either version 2.1 of the License, or (at your option) *
* any later version. *
* *
* This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied *
* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for *
* more details. *
* *
* You should have received a copy of the GNU Lesser General Public License along with this program; if not, you may *
* find one here: *
* https://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt *
* or you may search the http://www.gnu.org website for the version 2.1 license, or you may write to the Free Software *
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA *
**********************************************************************************************************************/

`default_nettype none

module Delay(clk, clk_delayed);

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// I/O declarations

(* LOC = "P19" *)
output wire clk;

(* LOC = "P18" *)
output wire clk_delayed;

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// Oscillators

//The 1730 Hz oscillator
wire clk_108hz;
GP_LFOSC #(
.PWRDN_EN(0),
.AUTO_PWRDN(0),
.OUT_DIV(16)
) lfosc (
.PWRDN(1'b0),
.CLKOUT(clk_108hz)
);

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// The delay line

GP_DELAY #(.DELAY_STEPS(4)) delay(
.IN(clk),
.OUT(clk_delayed)
);

endmodule