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base repository: azonenberg/openfpga
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head repository: azonenberg/openfpga
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Commits on Dec 8, 2016
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Commits on Dec 10, 2016
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greenpak4: Do not hold unused shift registers in reset forever; this …
…gives a DRC warning in GreenPAK Designer
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doc: Removed ACMP speed double from missing feature list b/c it's no …
…longer supported by Silego
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greenpak4: Unused shift registers are now held in reset again (proper…
… idle state for unused shregs)
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Commits on Dec 11, 2016
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greenpak4: Implemented DAC driving GP_VREF block for SLG46140V. Updat…
…ed doc to reflect DAC->VREF now works.
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Commits on Dec 12, 2016
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Commits on Dec 16, 2016
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greenpak4: Initial skeleton work on DCMPs. Not fully implemented but …
…should be able to load netlists
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greenpak4: Continued work on initial DCMP support. Can now PAR a simp…
…le design but not generate bitstream.
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