Skip to content

Commit

Permalink
tests: Fixed incorrect truth table in Luts HiL test. Fixed incorrect …
Browse files Browse the repository at this point in the history
…LUT truth table in GP_2LUT example code
azonenberg committed Dec 31, 2016
1 parent 784bf6b commit 691962d
Showing 2 changed files with 2 additions and 2 deletions.
2 changes: 1 addition & 1 deletion doc/gp4-hdl.tex
Original file line number Diff line number Diff line change
@@ -986,7 +986,7 @@ \subsubsection{Verilog Usage Example}
wire b;
wire o;
GP_2LUT #(
.INIT(4'h4)
.INIT(4'h8)
) lut(
.IN0(a),
.IN1(b),
2 changes: 1 addition & 1 deletion tests/greenpak4/slg46620v/Luts.v
Original file line number Diff line number Diff line change
@@ -43,7 +43,7 @@ module Luts(din, dout_instantiated, dout_inferred);

GP_INV inv_inst (
.IN(din[0]), .OUT(dout_instantiated[0]));
GP_2LUT #(.INIT(4'hB)) lut2_inst (
GP_2LUT #(.INIT(4'h7)) lut2_inst (
.IN0(din[0]), .IN1(din[1]), .OUT(dout_instantiated[1]));
GP_3LUT #(.INIT(8'h7F)) lut3_inst (
.IN0(din[0]), .IN1(din[1]), .IN2(din[2]), .OUT(dout_instantiated[2]));

0 comments on commit 691962d

Please sign in to comment.