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base repository: m-labs/artiq
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head repository: m-labs/artiq
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compare: c065b5866fff
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  • 2 commits
  • 6 files changed
  • 1 contributor

Commits on Jul 7, 2016

  1. Copy the full SHA
    8cb29fc View commit details
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    c065b58 View commit details
Showing with 20 additions and 168 deletions.
  1. +1 −1 artiq/examples/artiq_ipython_notebook.ipynb
  2. +15 −4 artiq/gateware/targets/kc705.py
  3. +0 −157 artiq/monkey_patches.py
  4. +0 −2 artiq/protocols/asyncio_server.py
  5. +2 −2 conda/artiq/meta.yaml
  6. +2 −2 setup.py
2 changes: 1 addition & 1 deletion artiq/examples/artiq_ipython_notebook.ipynb
Original file line number Diff line number Diff line change
@@ -362,7 +362,7 @@
"name": "python",
"nbconvert_exporter": "python",
"pygments_lexer": "ipython3",
"version": "3.5.1"
"version": "3.5.2"
}
},
"nbformat": 4,
19 changes: 15 additions & 4 deletions artiq/gateware/targets/kc705.py
Original file line number Diff line number Diff line change
@@ -33,7 +33,7 @@ def __init__(self, platform, rtio_internal_clk):

# 10 MHz when using 125MHz input
self.clock_domains.cd_ext_clkout = ClockDomain(reset_less=True)
ext_clkout = platform.request("user_sma_gpio_p")
ext_clkout = platform.request("user_sma_gpio_p_33")
self.sync.ext_clkout += ext_clkout.eq(~ext_clkout)


@@ -79,6 +79,16 @@ def __init__(self, platform, rtio_internal_clk):
]


# The default user SMA voltage on KC705 is 2.5V, and the Migen platform
# follows this default. But since the SMAs are on the same bank as the DDS,
# which is set to 3.3V by reprogramming the KC705 power ICs, we need to
# redefine them here.
_sma33_io = [
("user_sma_gpio_p_33", 0, Pins("Y23"), IOStandard("LVCMOS33")),
("user_sma_gpio_n_33", 0, Pins("Y24"), IOStandard("LVCMOS33")),
]


_ams101_dac = [
("ams101_dac", 0,
Subsignal("ldac", Pins("XADC:GPIO0")),
@@ -131,6 +141,7 @@ def __init__(self, cpu_type="or1k", **kwargs):
self.platform.request("user_led", 0),
self.platform.request("user_led", 1)))

self.platform.add_extension(_sma33_io)
self.platform.add_extension(_ams101_dac)

i2c = self.platform.request("i2c")
@@ -192,7 +203,7 @@ def __init__(self, cpu_type="or1k", **kwargs):
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))

phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n"))
phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n_33"))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))
phy = ttl_simple.Output(platform.request("user_led", 2))
@@ -248,7 +259,7 @@ def __init__(self, cpu_type="or1k", **kwargs):
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))

phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n"))
phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n_33"))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))

@@ -326,7 +337,7 @@ def __init__(self, cpu_type="or1k", **kwargs):
clock_generators.append(rtio.Channel.from_phy(phy))

# user SMA on KC705 board
phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n"))
phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n_33"))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))

157 changes: 0 additions & 157 deletions artiq/monkey_patches.py

This file was deleted.

2 changes: 0 additions & 2 deletions artiq/protocols/asyncio_server.py
Original file line number Diff line number Diff line change
@@ -1,8 +1,6 @@
import asyncio
from copy import copy

from artiq.monkey_patches import *


class AsyncioServer:
"""Generic TCP server based on asyncio.
4 changes: 2 additions & 2 deletions conda/artiq/meta.yaml
Original file line number Diff line number Diff line change
@@ -12,12 +12,12 @@ build:

requirements:
build:
- python >=3.5.1
- python >=3.5.2
- setuptools
- numpy
- binutils-or1k-linux
run:
- python >=3.5.1
- python >=3.5.2
- llvmlite-artiq 0.10.0.dev py35_24
- lit
- outputcheck
4 changes: 2 additions & 2 deletions setup.py
Original file line number Diff line number Diff line change
@@ -6,8 +6,8 @@
import versioneer


if sys.version_info[:3] < (3, 5, 1):
raise Exception("You need Python 3.5.1+")
if sys.version_info[:3] < (3, 5, 2):
raise Exception("You need Python 3.5.2+")


# Depends on PyQt5, but setuptools cannot check for it.