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targets/kc705: redefine user SMAs as 3.3V IO. Closes #502
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sbourdeauducq committed Jul 7, 2016
1 parent d96d222 commit adcf53f
Showing 1 changed file with 15 additions and 4 deletions.
19 changes: 15 additions & 4 deletions artiq/gateware/targets/kc705.py
Original file line number Diff line number Diff line change
@@ -34,7 +34,7 @@ def __init__(self, platform, rtio_internal_clk):

# 10 MHz when using 125MHz input
self.clock_domains.cd_ext_clkout = ClockDomain(reset_less=True)
ext_clkout = platform.request("user_sma_gpio_p")
ext_clkout = platform.request("user_sma_gpio_p_33")
self.sync.ext_clkout += ext_clkout.eq(~ext_clkout)


@@ -80,6 +80,16 @@ def __init__(self, platform, rtio_internal_clk):
]


# The default user SMA voltage on KC705 is 2.5V, and the Migen platform
# follows this default. But since the SMAs are on the same bank as the DDS,
# which is set to 3.3V by reprogramming the KC705 power ICs, we need to
# redefine them here.
_sma33_io = [
("user_sma_gpio_p_33", 0, Pins("Y23"), IOStandard("LVCMOS33")),
("user_sma_gpio_n_33", 0, Pins("Y24"), IOStandard("LVCMOS33")),
]


_ams101_dac = [
("ams101_dac", 0,
Subsignal("ldac", Pins("XADC:GPIO0")),
@@ -132,6 +142,7 @@ def __init__(self, cpu_type="or1k", **kwargs):
self.platform.request("user_led", 0),
self.platform.request("user_led", 1)))

self.platform.add_extension(_sma33_io)
self.platform.add_extension(_ams101_dac)

i2c = self.platform.request("i2c")
@@ -193,7 +204,7 @@ def __init__(self, cpu_type="or1k", **kwargs):
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))

phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n"))
phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n_33"))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))
phy = ttl_simple.Output(platform.request("user_led", 2))
@@ -249,7 +260,7 @@ def __init__(self, cpu_type="or1k", **kwargs):
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))

phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n"))
phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n_33"))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))

@@ -327,7 +338,7 @@ def __init__(self, cpu_type="or1k", **kwargs):
clock_generators.append(rtio.Channel.from_phy(phy))

# user SMA on KC705 board
phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n"))
phy = ttl_serdes_7series.Inout_8X(platform.request("user_sma_gpio_n_33"))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512))

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