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  • 2 commits
  • 2 files changed
  • 1 contributor

Commits on Jul 21, 2016

  1. doc/installing_from_source: update/fix (closes #516)

    @jordens
    jordens committed Jul 21, 2016
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    06bb1a2 View commit details

  2. doc/management_system: point out check_pause() (closes #522)

    @jordens
    jordens committed Jul 21, 2016
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    ecda947 View commit details
Showing with 20 additions and 3 deletions.
  1. +16 −2 doc/manual/installing_from_source.rst
  2. +4 −1 doc/manual/management_system.rst
18 changes: 16 additions & 2 deletions doc/manual/installing_from_source.rst
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Original file line number Diff line number Diff line change
@@ -28,7 +28,7 @@ and the ARTIQ kernels.
$ cd ~/artiq-dev
$ wget https://ftp.gnu.org/gnu/binutils/binutils-2.26.tar.bz2
$ tar xvf binutils-2.26.tar.bz2
$ rm binutils-2.26.tar.bz2
$ cd binutils-2.26

$ mkdir build
$ cd build
@@ -96,13 +96,27 @@ These steps are required to generate gateware bitstream (``.bit``) files, build

* :ref:`Download and install OpenOCD <install-openocd>`.

* Download and install ``asyncserial``: ::

$ cd ~/artiq-dev
$ git clone https://www.github.com/m-labs/asyncserial
$ cd asyncserial
$ python3.5 setup.py develop --user

* Download and install MiSoC: ::

$ cd ~/artiq-dev
$ git clone --recursive https://github.com/m-labs/misoc
$ cd misoc
$ python3.5 setup.py develop --user

* Download and install ``pythonparser``: ::

$ cd ~/artiq-dev
$ git clone https://www.github.com/m-labs/pythonparser
$ cd pythonparser
$ python3.5 setup.py develop --user

* Download and install ARTIQ: ::

$ cd ~/artiq-dev
@@ -170,7 +184,7 @@ Installing the host-side software
$ cd ~/artiq-dev
$ git clone https://github.com/m-labs/llvmlite
$ cd llvmlite
$ git checkout artiq
$ git checkout artiq-3.8
$ LLVM_CONFIG=/usr/local/llvm-or1k/bin/llvm-config python3.5 setup.py install --user

* Install ARTIQ: ::
5 changes: 4 additions & 1 deletion doc/manual/management_system.rst
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@@ -65,7 +65,10 @@ When determining what experiment to begin executing next (i.e. entering the prep
Pauses
------

In the run stage, an experiment may yield to the scheduler by calling the ``pause`` method. If there are other experiments with higher priority (e.g. a high-priority timed experiment has reached its due date), they are preemptively executed, and then the ``pause`` method returns. Otherwise, the ``pause`` method returns immediately.
In the run stage, an experiment may yield to the scheduler by calling the ``pause()`` method of the scheduler.
If there are other experiments with higher priority (e.g. a high-priority timed experiment has reached its due date), they are preemptively executed, and then ``pause()`` returns.
Otherwise, ``pause()`` returns immediately.
To check whether ``pause()`` would in fact *not* return immediately, use :meth:`artiq.master.scheduler.Scheduler.check_pause`.

The experiment must place the hardware in a safe state and disconnect from the core device (typically, by using ``self.core.comm.close()``) before calling ``pause``.