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committedMay 23, 2017
Various tweaks to Dac test case. Updated documentation to reflect that inference of parallel counter outputs to DACs is now supported
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Diff for: ‎doc/gp4-hdl.tex

+3-5
Original file line numberDiff line numberDiff line change
@@ -806,9 +806,9 @@ \subsection{Counters}
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\namestyle{Yosys} provides limited inference capability for counters which match the capabilities of the hard macro counters
807807
(\tokenref{GP\_COUNT8}{gp-count8} and \tokenref{GP\_COUNT14}{gp-count14}) in the device.
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809-
Some hard macro capabilities (most notably input dividers and parallel output to DCMP/DAC blocks) are not yet supported
810-
for inference; if these capabilities are required then use explicit primitive instantiation. Future software releases
811-
will expand the set of counter features which may be inferred.
809+
Some hard macro capabilities (most notably input dividers) are not yet supported for inference; if these capabilities
810+
are required then use explicit primitive instantiation. Future software releases will expand the set of counter
811+
features which may be inferred.
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813813
\subsubsection{Inference Requirements}
814814

@@ -819,8 +819,6 @@ \subsubsection{Inference Requirements}
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\item Count down only
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\item Be initialized to the same (maximum) value by both underflow and by power-on reset
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\item Have either no reset, or a positive level triggered reset to zero
822-
\item Not have any logic use the internal counter register. Only the ``underflow" signal may be used by surrounding
823-
logic.
824822
\end{itemize}
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\subsubsection{Counter Related Constraints}

Diff for: ‎tests/greenpak4/CMakeLists.txt

+2-1
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,8 @@ function(add_greenpak4_netlist name part)
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add_custom_command(
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OUTPUT "${CMAKE_CURRENT_BINARY_DIR}/${name}.json"
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COMMAND "${YOSYS_COMMAND}" -q
27+
COMMAND "${YOSYS_COMMAND}"
28+
-q
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-p "read_verilog ${CMAKE_CURRENT_SOURCE_DIR}/${name}.v"
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-p "synth_greenpak4 -top ${name} -part ${part}"
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-p "write_json ${CMAKE_CURRENT_BINARY_DIR}/${name}.json"

Diff for: ‎tests/greenpak4/slg46620v/Dac.v

+8-30
Original file line numberDiff line numberDiff line change
@@ -98,10 +98,7 @@ module Dac(bg_ok, vout, vout2, wave_sync);
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localparam COUNT_MAX = 255;
100100

101-
//TODO: support for inference of counters with parallel output
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/*
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(* LOC = "COUNT8_6" *)
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(* COUNT_EXTRACT = "FORCE" *)
101+
//Inferred counter that drives both the DAC and an overflow output
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reg[7:0] count = COUNT_MAX;
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always @(posedge clk_1730hz) begin
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if(count == 0)
@@ -112,32 +109,19 @@ module Dac(bg_ok, vout, vout2, wave_sync);
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113110
//Counter overflow signal to LED
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assign wave_sync = (count == 0);
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*/
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//Explicitly instantiated counter b/c we don't yet have inference support when using POUT
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wire[7:0] count_pout;
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GP_COUNT8 #(
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.CLKIN_DIVIDE(1),
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.COUNT_TO(COUNT_MAX),
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.RESET_MODE("RISING")
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) cnt (
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.CLK(clk_1730hz),
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.RST(1'b0),
126-
.OUT(wave_sync),
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.POUT(count_pout)
128-
);
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130113
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// DAC driving the voltage reference
114+
// The DACs
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133-
wire vdac;
116+
//This one drives a top-level output pin directly (GP_VREF and GP_ACMP are infrred)
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(* LOC = "DAC_1" *)
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GP_DAC dac(
136-
.DIN(count_pout),
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.VOUT(vdac),
119+
.DIN(count),
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.VOUT(vout),
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.VREF(vref_1v0)
139122
);
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124+
//This one drives a GP_VREF explicitly (GP_ACMP is inferred)
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wire vdac2;
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(* LOC = "DAC_0" *)
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GP_DAC dac2(
@@ -146,21 +130,15 @@ module Dac(bg_ok, vout, vout2, wave_sync);
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.VREF(vref_1v0)
147131
);
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Drive one pin with the DAC output directly, no vref
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152-
//assign vout = vdac;
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assign vout2 = vdac2;
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Drive the other via a buffered reference
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GP_VREF #(
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.VIN_DIV(4'd1),
160138
.VREF(16'd00)
161139
) vrdac (
162-
.VIN(vdac),
163-
.VOUT(vout)
140+
.VIN(vdac2),
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.VOUT(vout2)
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);
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