Continued work on DAC support. See #32

azonenberg · azonenberg · commit a38304c196f2 · 2017-05-22T17:44:00.000-07:00
diff --git a/src/gp4par/make_graphs.cpp b/src/gp4par/make_graphs.cpp
@@ -194,16 +194,41 @@ void InferExtraNodes(
 	auto vdd = top->GetNet("GP_VDD");
 	auto vddn = device->GetPowerRail(true)->GetPARNode();
 
-	//Look for IOBs driven by GP_VREF cells
+	//Look for DACs driven by counters and infer DCMP if one isn't already there
 	Greenpak4NetlistModule* module = netlist->GetTopModule();
 	for(auto it = module->cell_begin(); it != module->cell_end(); it ++)
+	{
+		//Skip anything but DACs
+		Greenpak4NetlistCell* cell = it->second;
+		if(cell->m_type != "GP_DAC")
+			continue;
+
+		//If we're driven by a power rail, skip it - input is constant
+		if(cell->m_connections.find("DIN") == cell->m_connections.end())
+			continue;
+		auto net = cell->m_connections["DIN"][0];
+		auto driver = net->m_driver;
+		if(driver.IsNull())
+			continue;
+		if(driver.m_cell->IsPowerRail() )
+			continue;
+		Greenpak4NetlistCell* netsrc = driver.m_cell;
+
+		//We found the source of the net!
+		LogVerbose("Found a DAC not driven by a power rail\n");
+	}
+
+	//Look for IOBs driven by GP_VREF cells
+	for(auto it = module->cell_begin(); it != module->cell_end(); it ++)
 	{
 		//See if we're an IOB
 		Greenpak4NetlistCell* cell = it->second;
 		if(!cell->IsIOB())
 			continue;
 
 		//See if we're driven by a GP_VREF
+		if(cell->m_connections.find("IN") == cell->m_connections.end())
+			continue;
 		auto net = cell->m_connections["IN"][0];
 		auto driver = net->m_driver;
 		if(driver.IsNull())
@@ -298,6 +323,8 @@ void InferExtraNodes(
 		//LogDebug("vref %s\n", cell->m_name.c_str());
 
 		//See what we drive
+		if(cell->m_connections.find("VOUT") == cell->m_connections.end())
+			continue;
 		auto net = cell->m_connections["VOUT"][0];
 		bool found_target = false;
 		for(int i=net->m_nodeports.size()-1; i>=0; i--)
diff --git a/src/gp4par/par_main.cpp b/src/gp4par/par_main.cpp
@@ -161,7 +161,7 @@ bool PostPARDRC(PARGraph* netlist, Greenpak4Device* device)
 		}
 	}
 
-	//TODO: check floating inputs etc
+	//TODO: check floating inputs etc?
 
 	//Check invalid IOB configuration
 	//TODO: driving an input-only pin etc - is this possible?
@@ -220,6 +220,11 @@ bool PostPARDRC(PARGraph* netlist, Greenpak4Device* device)
 		//so nothing to do here
 	}
 
+	//Check for DACs not sharing input with DCMP1 negative, but also not a constant
+	//TODO: check for DACs with wrong input bit ordering or not same source for all bits
+
+	//TODO: check for DCMPs with wrong input bit ordering or not same source for all bits
+
 	//Check for multiple ACMPs using different settings of ACMP0's output mux
 	typedef pair<string, Greenpak4EntityOutput> spair;
 	switch(device->GetPart())
diff --git a/src/greenpak4/Greenpak4DAC.cpp b/src/greenpak4/Greenpak4DAC.cpp
@@ -200,11 +200,13 @@ bool Greenpak4DAC::Save(bool* bitstream)
 			bitstream[m_cbaseReg + i] = m_din[i].GetPowerRailValue();
 	}
 
-	//TODO: need to infer DCMP/PWM for this
+	//Input is coming from DCMP.
+	//Rely on the DCMP input mux for this, nothing for us to do.
+	//Set the input voltage to zero just so the bitstream is deterministic.
 	else
 	{
-		LogError("DRC: DAC input from counters etc not implemented yet\n");
-		return false;
+		for(unsigned int i=0; i<8; i++)
+			bitstream[m_cbaseReg + i] = false;
 	}
 
 	return true;
diff --git a/src/greenpak4/Greenpak4NetlistCell.h b/src/greenpak4/Greenpak4NetlistCell.h
@@ -1,5 +1,5 @@
 /***********************************************************************************************************************
- * Copyright (C) 2016 Andrew Zonenberg and contributors                                                                *
+ * Copyright (C) 2017 Andrew Zonenberg and contributors                                                                *
  *                                                                                                                     *
  * This program is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General   *
  * Public License as published by the Free Software Foundation; either version 2.1 of the License, or (at your option) *
@@ -54,6 +54,10 @@ class Greenpak4NetlistCell : public Greenpak4NetlistEntity
 	bool IsIOB()
 	{ return (m_type == "GP_IBUF") || (m_type == "GP_IOBUF") || (m_type == "GP_OBUF") || (m_type == "GP_OBUFT"); }
 
+	//Indicates whether the cell is a power rail
+	bool IsPowerRail()
+	{ return (m_type == "GP_VDD") || (m_type == "GP_VSS"); }
+
 	std::string GetLOC();
 
 	bool HasLOC()
diff --git a/tests/greenpak4/CMakeLists.txt b/tests/greenpak4/CMakeLists.txt
@@ -78,6 +78,7 @@ function(add_greenpak4_bitstream name part)
 		COMMAND gp4par "--stdout-only"
 					   --usercode 41
 					   --quiet
+					   --debug
 					   --part ${part}
 					   ${pcfargs1}
 					   ${pcfargs2}

Original file line number	Diff line number	Diff line change
`@@ -161,7 +161,7 @@ bool PostPARDRC(PARGraph* netlist, Greenpak4Device* device)`
`161`	`161`	`}`
`162`	`162`	`}`
`163`	`163`
`164`		`- //TODO: check floating inputs etc`
	`164`	`+ //TODO: check floating inputs etc?`
`165`	`165`
`166`	`166`	`//Check invalid IOB configuration`
`167`	`167`	`//TODO: driving an input-only pin etc - is this possible?`
`@@ -220,6 +220,11 @@ bool PostPARDRC(PARGraph* netlist, Greenpak4Device* device)`
`220`	`220`	`//so nothing to do here`
`221`	`221`	`}`
`222`	`222`
	`223`	`+ //Check for DACs not sharing input with DCMP1 negative, but also not a constant`
	`224`	`+ //TODO: check for DACs with wrong input bit ordering or not same source for all bits`
	`225`	`+`
	`226`	`+ //TODO: check for DCMPs with wrong input bit ordering or not same source for all bits`
	`227`	`+`
`223`	`228`	`//Check for multiple ACMPs using different settings of ACMP0's output mux`
`224`	`229`	`typedef pair<string, Greenpak4EntityOutput> spair;`
`225`	`230`	`switch(device->GetPart())`
Original file line number	Diff line number	Diff line change
`@@ -200,11 +200,13 @@ bool Greenpak4DAC::Save(bool* bitstream)`
`200`	`200`	`bitstream[m_cbaseReg + i] = m_din[i].GetPowerRailValue();`
`201`	`201`	`}`
`202`	`202`
`203`		`- //TODO: need to infer DCMP/PWM for this`
	`203`	`+ //Input is coming from DCMP.`
	`204`	`+ //Rely on the DCMP input mux for this, nothing for us to do.`
	`205`	`+ //Set the input voltage to zero just so the bitstream is deterministic.`
`204`	`206`	`else`
`205`	`207`	`{`
`206`		`- LogError("DRC: DAC input from counters etc not implemented yet\n");`
`207`		`- return false;`
	`208`	`+ for(unsigned int i=0; i<8; i++)`
	`209`	`+ bitstream[m_cbaseReg + i] = false;`
`208`	`210`	`}`
`209`	`211`
`210`	`212`	`return true;`