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Commit db39eef

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Desoursfan5
authored andcommittedOct 29, 2017
Make the fpga overheat
1 parent f78937b commit db39eef

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Diff for: ‎mesecons_fpga/init.lua

+6-1
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,7 @@ plg.register_nodes({
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sunlight_propagates = true,
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paramtype = "light",
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walkable = true,
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groups = {dig_immediate = 2, mesecon = 3},
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groups = {dig_immediate = 2, mesecon = 3, overheat = 1},
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drop = "mesecons_fpga:fpga0000",
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selection_box = {
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type = "fixed",
@@ -309,6 +309,11 @@ plg.update = function(pos)
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local meta = minetest.get_meta(pos)
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if meta:get_int("valid") ~= 1 then
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return
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elseif mesecon.do_overheat(pos) then
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plg.setports(pos, false, false, false, false)
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meta:set_int("valid", 0)
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meta:set_string("infotext", "FPGA (overheated)")
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return
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end
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local is = lcore.deserialize(meta:get_string("instr"))

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