|
3 | 3 |
|
4 | 4 |
|
5 | 5 | _io = [
|
6 |
| - ("user_led", 0, Pins("Y19"), IOStandard("LVCMOS25")), # LED_USER1 |
| 6 | + ("user_led", 0, Pins("T16"), IOStandard("LVCMOS25")), # LED_USER1 |
7 | 7 |
|
8 |
| - ("clk50", 0, Pins("Y18"), IOStandard("LVCMOS25")), |
| 8 | + ("clk50", 0, Pins("W19"), IOStandard("LVCMOS25")), |
9 | 9 |
|
10 | 10 | ("clk_fpgaio", 0,
|
11 |
| - Subsignal("p", Pins("W19")), |
12 |
| - Subsignal("n", Pins("W20")), |
| 11 | + Subsignal("p", Pins("Y18")), |
| 12 | + Subsignal("n", Pins("Y19")), |
13 | 13 | IOStandard("LVDS25"),
|
14 | 14 | ),
|
15 | 15 |
|
|
20 | 20 | ),
|
21 | 21 |
|
22 | 22 | ("serial", 0,
|
23 |
| - Subsignal("tx", Pins("V22")), |
24 |
| - Subsignal("rx", Pins("P16")), |
| 23 | + Subsignal("tx", Pins("N13")), |
| 24 | + Subsignal("rx", Pins("N17")), |
25 | 25 | IOStandard("LVCMOS25")
|
26 | 26 | ),
|
27 | 27 |
|
28 |
| - ("clk_sel", 0, Pins("W22"), IOStandard("LVCMOS25")), |
| 28 | + ("clk_sel", 0, Pins("F21"), IOStandard("LVCMOS25")), |
| 29 | + |
| 30 | + ("vusb_present", 0, Pins("M17"), IOStandard("LVCMOS25")), |
29 | 31 |
|
30 | 32 | ("i2c", 0,
|
31 |
| - Subsignal("scl", Pins("U21")), |
32 |
| - Subsignal("sda", Pins("T21")), |
| 33 | + Subsignal("scl", Pins("J16")), |
| 34 | + Subsignal("sda", Pins("F15")), |
33 | 35 | IOStandard("LVCMOS25")
|
34 | 36 | ),
|
35 | 37 |
|
36 | 38 | ("spiflash", 0,
|
37 | 39 | Subsignal("cs_n", Pins("T19")),
|
38 | 40 | Subsignal("dq", Pins("P22 R22 P21 R21")),
|
| 41 | + # "clk" is on CCLK |
39 | 42 | IOStandard("LVCMOS25")
|
40 | 43 | ),
|
41 | 44 |
|
|
44 | 47 | Subsignal("n", Pins("E6")),
|
45 | 48 | ),
|
46 | 49 |
|
47 |
| - # ("clk125_gtp", 0, |
48 |
| - # Subsignal("p", Pins("F10")), |
49 |
| - # Subsignal("n", Pins("E10")), |
50 |
| - # ), |
| 50 | + ("clk125_gtp", 0, |
| 51 | + Subsignal("p", Pins("F10")), |
| 52 | + Subsignal("n", Pins("E10")), |
| 53 | + ), |
51 | 54 |
|
52 | 55 | ("sfp_gtp", 0,
|
53 | 56 | Subsignal("txp", Pins("B4")),
|
|
56 | 59 | Subsignal("rxn", Pins("A8")),
|
57 | 60 | ),
|
58 | 61 | ("sfp", 0,
|
59 |
| - Subsignal("mod_def1", Pins("T3")), |
60 |
| - Subsignal("mod_def2", Pins("U7")), |
61 |
| - Subsignal("los", Pins("U17")), |
62 |
| - Subsignal("mod_present", Pins("U18")), |
63 |
| - Subsignal("rate_select", Pins("P14")), |
| 62 | + Subsignal("mod_def1", Pins("U7")), |
| 63 | + Subsignal("mod_def2", Pins("T3")), |
| 64 | + Subsignal("los", Pins("P15")), |
| 65 | + Subsignal("mod_present", Pins("U16")), |
| 66 | + Subsignal("rate_select", Pins("N15")), |
64 | 67 | Subsignal("tx_disable", Pins("R14")),
|
65 |
| - Subsignal("tx_fault", Pins("R18")), |
66 |
| - Subsignal("led", Pins("N17")), |
| 68 | + Subsignal("tx_fault", Pins("N14")), |
| 69 | + Subsignal("led", Pins("P16")), |
67 | 70 | IOStandard("LVCMOS25")
|
68 | 71 | ),
|
69 | 72 |
|
|
74 | 77 | Subsignal("rxn", Pins("C11")),
|
75 | 78 | ),
|
76 | 79 | ("sfp", 1,
|
77 |
| - # ... |
78 |
| - Subsignal("led", Pins("T18")), |
| 80 | + Subsignal("mod_def1", Pins("P17")), |
| 81 | + Subsignal("mod_def2", Pins("U18")), |
| 82 | + Subsignal("los", Pins("R18")), |
| 83 | + Subsignal("mod_present", Pins("W20")), |
| 84 | + Subsignal("rate_select", Pins("T18")), |
| 85 | + Subsignal("tx_disable", Pins("R17")), |
| 86 | + Subsignal("tx_fault", Pins("U17")), |
| 87 | + Subsignal("led", Pins("R19")), |
79 | 88 | IOStandard("LVCMOS25")
|
80 | 89 | ),
|
81 | 90 |
|
|
86 | 95 | Subsignal("rxn", Pins("A10")),
|
87 | 96 | ),
|
88 | 97 | ("sfp", 2,
|
89 |
| - # ... |
90 |
| - Subsignal("led", Pins("P20")), |
| 98 | + Subsignal("mod_def1", Pins("P14")), |
| 99 | + Subsignal("mod_def2", Pins("P20")), |
| 100 | + Subsignal("los", Pins("V22")), |
| 101 | + Subsignal("mod_present", Pins("T21")), |
| 102 | + Subsignal("rate_select", Pins("T20")), |
| 103 | + Subsignal("tx_disable", Pins("U21")), |
| 104 | + Subsignal("tx_fault", Pins("R16")), |
| 105 | + Subsignal("led", Pins("P19")), |
91 | 106 | IOStandard("LVCMOS25")
|
92 | 107 | ),
|
93 | 108 |
|
|
100 | 115 |
|
101 | 116 | ("ddram", 0,
|
102 | 117 | Subsignal("a", Pins(
|
103 |
| - "K2 G2 F3 J5 E2 H5 J2 K1 " |
104 |
| - "D1 E1 D2 A1 C2 B1 F4"), |
| 118 | + "L6 M5 P6 K6 M1 M3 N2 N7 " |
| 119 | + "P1 P2 L4 N5 L3 R1 N3"), |
105 | 120 | IOStandard("SSTL15")),
|
106 |
| - Subsignal("ba", Pins("H2 J1 G1"), IOStandard("SSTL15")), |
107 |
| - Subsignal("ras_n", Pins("K4"), IOStandard("SSTL15")), |
108 |
| - Subsignal("cas_n", Pins("G4"), IOStandard("SSTL15")), |
109 |
| - Subsignal("we_n", Pins("F1"), IOStandard("SSTL15")), |
| 121 | + Subsignal("ba", Pins("L5 M2 N4"), IOStandard("SSTL15")), |
| 122 | + Subsignal("ras_n", Pins("J4"), IOStandard("SSTL15")), |
| 123 | + Subsignal("cas_n", Pins("J6"), IOStandard("SSTL15")), |
| 124 | + Subsignal("we_n", Pins("K3"), IOStandard("SSTL15")), |
110 | 125 | # Subsignal("cs_n", Pins(""), IOStandard("SSTL15")),
|
111 |
| - Subsignal("dm", Pins("J4 N4"), IOStandard("SSTL15")), |
| 126 | + Subsignal("dm", Pins("G2 E2"), IOStandard("SSTL15")), |
112 | 127 | Subsignal("dq", Pins(
|
113 |
| - "L4 L5 J6 K6 K3 L3 M2 M3 " |
114 |
| - "P1 R1 N2 P2 M5 M6 N5 P6"), |
| 128 | + "G3 J1 H4 H5 H2 K1 H3 J5 " |
| 129 | + "G1 B1 F1 F3 C2 A1 D2 B2"), |
115 | 130 | IOStandard("SSTL15"),
|
116 | 131 | Misc("IN_TERM=UNTUNED_SPLIT_50")),
|
117 |
| - Subsignal("dqs_p", Pins("M1 P5"), IOStandard("DIFF_SSTL15")), |
118 |
| - Subsignal("dqs_n", Pins("L1 P4"), IOStandard("DIFF_SSTL15")), |
119 |
| - Subsignal("clk_p", Pins("H3"), IOStandard("DIFF_SSTL15")), |
120 |
| - Subsignal("clk_n", Pins("G3"), IOStandard("DIFF_SSTL15")), |
121 |
| - Subsignal("cke", Pins("B2"), IOStandard("SSTL15")), |
122 |
| - Subsignal("odt", Pins("H4"), IOStandard("SSTL15")), |
123 |
| - Subsignal("reset_n", Pins("L6"), IOStandard("LVCMOS15")), |
| 132 | + Subsignal("dqs_p", Pins("K2 E1"), IOStandard("DIFF_SSTL15")), |
| 133 | + Subsignal("dqs_n", Pins("J2 D1"), IOStandard("DIFF_SSTL15")), |
| 134 | + Subsignal("clk_p", Pins("P5"), IOStandard("DIFF_SSTL15")), |
| 135 | + Subsignal("clk_n", Pins("P4"), IOStandard("DIFF_SSTL15")), |
| 136 | + Subsignal("cke", Pins("L1"), IOStandard("SSTL15")), |
| 137 | + Subsignal("odt", Pins("K4"), IOStandard("SSTL15")), |
| 138 | + Subsignal("reset_n", Pins("G4"), IOStandard("LVCMOS15")), |
124 | 139 | Misc("SLEW=FAST"),
|
125 | 140 | ),
|
126 | 141 | ]
|
127 | 142 |
|
128 | 143 |
|
129 | 144 | _connectors = [
|
130 | 145 | ("EEM0", {
|
131 |
| - "D0_CC_P": "V4", |
132 |
| - "D0_CC_N": "W4", |
133 |
| - "D1_P": "T1", |
134 |
| - "D1_N": "U1", |
135 |
| - "D2_P": "U2", |
136 |
| - "D2_N": "V2", |
137 |
| - "D3_P": "R3", |
138 |
| - "D3_N": "R2", |
139 |
| - "D4_P": "W2", |
140 |
| - "D4_N": "Y2", |
141 |
| - "D5_P": "W1", |
142 |
| - "D6_P": "Y1", |
143 |
| - "D6_N": "U3", |
144 |
| - "D5_N": "V3", |
145 |
| - "D7_P": "AA1", |
146 |
| - "D7_N": "AB1", |
| 146 | + "D0_CC_P": "R4", |
| 147 | + "D0_CC_N": "T4", |
| 148 | + "D1_P": "R3", |
| 149 | + "D1_N": "R2", |
| 150 | + "D2_P": "T1", |
| 151 | + "D2_N": "U1", |
| 152 | + "D3_P": "U2", |
| 153 | + "D3_N": "V2", |
| 154 | + "D4_P": "W1", |
| 155 | + "D4_N": "Y1", |
| 156 | + "D5_P": "W2", |
| 157 | + "D6_P": "Y2", |
| 158 | + "D6_N": "AA1", |
| 159 | + "D5_N": "AB1", |
| 160 | + "D7_P": "Y4", |
| 161 | + "D7_N": "AA4", |
147 | 162 | }),
|
148 | 163 |
|
149 | 164 | # ...
|
|
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