If I just open the "displayport_out.xise" and click "Generate Programming File" the top_level.bit should run on an Opsis board and produce DisplayPort output right?

Should do.

Did you get the pull request? (The bit file will be in the ',work' directory)

Yes, I'm using the video/displayport/output/work/top_level.bit file. My code version is hamsternz@d1416c3 (from your repo).

Still nothing with this monitor. Will try with a different monitor shortly. Is there anything useful I can get from looking at the debug pins?

It does look like you are using an older ISE (14.6?) version then me?

-  <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/>
+  <version xil_pn:ise_version="14.7" xil_pn:schema_version="2"/>

I assume you are programming with a JTAG cable? I'm currently using the FX2 but can give it a go with that in case there is something else going on? (I could also probe the design with ChipScope...)