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Commit b0d940a

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author
whitequark
committedJan 30, 2017
liteeth: make rx/tx slot count configurable.
1 parent c8d5fd3 commit b0d940a

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Diff for: ‎misoc/cores/liteeth_mini/mac/__init__.py

+4-2
Original file line numberDiff line numberDiff line change
@@ -10,11 +10,13 @@ class LiteEthMAC(Module, AutoCSR):
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def __init__(self, phy, dw,
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interface="wishbone",
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endianness="big",
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with_preamble_crc=True):
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with_preamble_crc=True,
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nrxslots=2,
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ntxslots=2):
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self.submodules.core = LiteEthMACCore(phy, dw, endianness, with_preamble_crc)
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self.csrs = []
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if interface == "wishbone":
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self.submodules.interface = LiteEthMACWishboneInterface(dw, 2, 2)
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self.submodules.interface = LiteEthMACWishboneInterface(dw, nrxslots, ntxslots)
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self.comb += [
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self.interface.source.connect(self.core.sink),
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self.core.source.connect(self.interface.sink)

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