Added CMakeLists.txt and generated enum headers

azonenberg · Mar 5, 2018 · 4ad3dcf · 4ad3dcf
1 parent 0a2872e
commit 4ad3dcf
Show file tree

Hide file tree

Showing 6 changed files with 132 additions and 0 deletions.
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -0,0 +1,55 @@
+# CMake build script for jtaghal.
+# Intended to be integrated into a larger project, not built standalone.
+
+set(JTAGHAL_SOURCES 
+	jtaghal.cpp
+	JtagException.cpp
+    FirmwareImage.cpp
+    ByteArrayFirmwareImage.cpp
+    RawBinaryFirmwareImage.cpp
+    CPLDBitstream.cpp
+    FPGABitstream.cpp
+    DebuggableDevice.cpp
+    ProgrammableDevice.cpp
+    ProgrammableLogicDevice.cpp
+    JtagDevice.cpp
+    CPLD.cpp
+    FPGA.cpp
+    JtagFPGA.cpp
+    Microcontroller.cpp
+    DebuggerInterface.cpp
+    GPIOInterface.cpp
+    JtagInterface.cpp
+    DigilentJtagInterface.cpp
+    FTDIJtagInterface.cpp
+    NetworkedJtagInterface.cpp
+    PipeJtagInterface.cpp
+    ARMDevice.cpp
+    MicrochipDevice.cpp
+    MicrochipMicrocontroller.cpp
+    MicrochipPIC32Device.cpp
+    XilinxDevice.cpp
+    XilinxCPLD.cpp
+    XilinxCoolRunnerIIDevice.cpp
+    XilinxFPGA.cpp
+    Xilinx7SeriesDevice.cpp
+    XilinxUltrascaleDevice.cpp
+    XilinxSpartan3ADevice.cpp
+    XilinxSpartan6Device.cpp
+    XilinxFPGABitstream.cpp
+    Xilinx3DFPGABitstream.cpp
+    XilinxCPLDBitstream.cpp
+	)
+
+add_library(jtaghal SHARED
+	${JTAGHAL_SOURCES})
+target_link_libraries(jtaghal log)
+target_link_libraries(jtaghal xptools)
+set_property(TARGET jtaghal PROPERTY POSITION_INDEPENDENT_CODE ON)
+set_property(TARGET log PROPERTY POSITION_INDEPENDENT_CODE ON)
+set_property(TARGET xptools PROPERTY POSITION_INDEPENDENT_CODE ON)
+
+target_include_directories(jtaghal
+	PUBLIC ${CMAKE_CURRENT_SOURCE_DIR})
+
+install(TARGETS jtaghal LIBRARY DESTINATION /usr/lib)
diff --git a/JEDECVendorID_enum.h b/JEDECVendorID_enum.h
@@ -0,0 +1,11 @@
+#ifndef __JEDECVENDORID_H__
+#define __JEDECVENDORID_H__
+
+enum JEDECVendorID {
+    VENDOR_ID_ARM = 0x23b,
+    VENDOR_ID_MICROCHIP = 0x029,
+    VENDOR_ID_PHILIPS = 0x015,
+    VENDOR_ID_XILINX = 0x049,
+};
+
+#endif
diff --git a/UserPID_enum.h b/UserPID_enum.h
@@ -0,0 +1,9 @@
+#ifndef __USERPID_H__
+#define __USERPID_H__
+
+enum UserPID {
+    PID_AZONENBERG_ANTIKERNEL_NOC = 0x00,
+    PID_AZONENBERG_SPI_INDIRECT = 0x01,
+};
+
+#endif
diff --git a/UserVID_enum.h b/UserVID_enum.h
@@ -0,0 +1,8 @@
+#ifndef __USERVID_H__
+#define __USERVID_H__
+
+enum UserVID {
+    VID_AZONENBERG = 0x42445a,
+};
+
+#endif
diff --git a/XilinxDeviceID_enum.h b/XilinxDeviceID_enum.h
@@ -0,0 +1,14 @@
+#ifndef __XILINXDEVICEID_H__
+#define __XILINXDEVICEID_H__
+
+enum XilinxDeviceID {
+    XILINX_FAMILY_CR2_A = 0x36,
+    XILINX_FAMILY_CR2_B = 0x37,
+    XILINX_FAMILY_SPARTAN3A = 0x11,
+    XILINX_FAMILY_SPARTAN6 = 0x20,
+    XILINX_FAMILY_7SERIES = 0x1b,
+    XILINX_FAMILY_ULTRASCALE = 0x1c,
+    XILINX_FAMILY_USPLUS = 0x25,
+};
+
+#endif
diff --git a/jtagd_opcodes_enum.h b/jtagd_opcodes_enum.h
@@ -0,0 +1,35 @@
+#ifndef __JTAGD_OPCODES_H__
+#define __JTAGD_OPCODES_H__
+
+enum jtagd_opcodes {
+    JTAGD_OP_GET_NAME = 0x00,
+    JTAGD_OP_GET_SERIAL = 0x01,
+    JTAGD_OP_GET_USERID = 0x02,
+    JTAGD_OP_GET_FREQ = 0x03,
+    JTAGD_OP_SHIFT_DATA_WO = 0x06,
+    JTAGD_OP_SHIFT_DATA = 0x07,
+    JTAGD_OP_DUMMY_CLOCK = 0x08,
+    JTAGD_OP_PERF_SHIFT = 0x09,
+    JTAGD_OP_PERF_RECOV = 0x0a,
+    JTAGD_OP_PERF_DATA = 0x0b,
+    JTAGD_OP_PERF_MODE = 0x0c,
+    JTAGD_OP_PERF_DUMMY = 0x0d,
+    JTAGD_OP_QUIT = 0x0e,
+    JTAGD_OP_COMMIT = 0x0f,
+    JTAGD_OP_SPLIT_SUPPORTED = 0x10,
+    JTAGD_OP_SHIFT_DATA_WRITE_ONLY = 0x11,
+    JTAGD_OP_SHIFT_DATA_READ_ONLY = 0x12,
+    JTAGD_OP_DUMMY_CLOCK_DEFERRED = 0x13,
+    JTAGD_OP_HAS_GPIO = 0x14,
+    JTAGD_OP_GET_GPIO_PIN_COUNT = 0x15,
+    JTAGD_OP_READ_GPIO_STATE = 0x16,
+    JTAGD_OP_WRITE_GPIO_STATE = 0x17,
+    JTAGD_OP_TLR = 0x18,
+    JTAGD_OP_ENTER_SIR = 0x19,
+    JTAGD_OP_LEAVE_E1IR = 0x1a,
+    JTAGD_OP_ENTER_SDR = 0x1b,
+    JTAGD_OP_LEAVE_E1DR = 0x1c,
+    JTAGD_OP_RESET_IDLE = 0x1d,
+};
+
+#endif