sayma_amc: add Ethernet clock constraints

m-labs · Aug 17, 2017 · f7816e4 · f7816e4
1 parent ae063b2
commit f7816e4
Showing 1 changed file with 11 additions and 0 deletions.
diff --git a/migen/build/platforms/sinara/sayma_amc.py b/migen/build/platforms/sinara/sayma_amc.py
@@ -111,3 +111,14 @@ class Platform(XilinxPlatform):
 
     def __init__(self):
         XilinxPlatform.__init__(self, "xcku040-ffva1156-1-c", _io, toolchain="vivado")
+
+    def do_finalize(self, fragment):
+        XilinxPlatform.do_finalize(self, fragment)
+        try:
+            self.add_period_constraint(self.lookup_request("eth_clocks").rx, 8.0)
+        except ConstraintError:
+            pass
+        try:
+            self.add_period_constraint(self.lookup_request("eth_clocks").tx, 8.0)
+        except ConstraintError:
+            pass