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base repository: azonenberg/openfpga
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head repository: azonenberg/openfpga
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compare: 43a3a5c71c14
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  • 4 commits
  • 5 files changed
  • 1 contributor

Commits on Aug 7, 2017

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12 changes: 10 additions & 2 deletions src/greenpak4/Greenpak4BitstreamEntity.cpp
Original file line number Diff line number Diff line change
@@ -137,6 +137,14 @@ Greenpak4BitstreamEntity* Greenpak4BitstreamEntity::GetRealEntity()
return this;
}

const Greenpak4BitstreamEntity* Greenpak4BitstreamEntity::GetRealEntity() const
{
if(m_dual && !m_dualMaster)
return m_dual;

return this;
}

bool Greenpak4BitstreamEntity::WriteMatrixSelector(
bool* bitstream,
unsigned int wordpos,
@@ -208,7 +216,7 @@ void Greenpak4BitstreamEntity::ReadMatrixSelector(
unsigned int matrix,
Greenpak4EntityOutput& signal)
{
LogVerbose("Reading matrix selector for %s\n", GetDescription().c_str());
LogTrace("Reading matrix selector for %s\n", GetDescription().c_str());
LogIndenter li;

unsigned int nbits = m_device->GetMatrixBits();
@@ -240,7 +248,7 @@ void Greenpak4BitstreamEntity::ReadMatrixSelector(
//TODO: Properly handle configuration if the primitive has multiple ports mapping to one net (e.g. Q/nQ)
if(output.GetMatrix() == matrix || output.HasDual() )
{
LogVerbose("Source for netnum %d: %s\n", netnum, output.GetOutputName().c_str());
LogTrace("Source for netnum %d: %s\n", netnum, output.GetOutputName().c_str());
signal = output;
nhits ++;
}
1 change: 1 addition & 0 deletions src/greenpak4/Greenpak4BitstreamEntity.h
Original file line number Diff line number Diff line change
@@ -112,6 +112,7 @@ class Greenpak4BitstreamEntity
@brief Returns the real entity if we are a dual, or us if we're not
*/
Greenpak4BitstreamEntity* GetRealEntity();
const Greenpak4BitstreamEntity* GetRealEntity() const;

//Return our dual, or NULL if we don't have one
Greenpak4BitstreamEntity* GetDual()
46 changes: 45 additions & 1 deletion src/greenpak4/Greenpak4DAC.cpp
Original file line number Diff line number Diff line change
@@ -144,8 +144,52 @@ bool Greenpak4DAC::CommitChanges()
return true;
}

bool Greenpak4DAC::Load(bool* /*bitstream*/)
bool Greenpak4DAC::Load(bool* bitstream)
{
//TODO: VREF
LogWarning("TODO: VREF configuration for Greenpak4DAC\n");

//If DAC is disabled, set VREF to ground (we're not used)
if(!bitstream[m_cbasePwr])
{
m_vref = m_device->GetGround();
return true;
}

//ignore cbaseAon for now

if(m_device->GetPart() == Greenpak4Device::GREENPAK4_SLG46140)
LogError("Greenpak4DAC: not implemented for 46140 yet\n");

//Input selector

/*
//WTF, the config is flipped from DAC0 to DAC1??? (see SLG46620V table 40)
//This also applies to the SLG46140 (see SLG46140 table 28).
bool dinPower = (m_din[0].IsPowerRail());
if(m_dacnum == 0)
bitstream[m_cbaseInsel] = !dinPower;
else
bitstream[m_cbaseInsel] = dinPower;
//Constant input voltage
if(dinPower)
{
for(unsigned int i=0; i<8; i++)
bitstream[m_cbaseReg + i] = m_din[i].GetPowerRailValue();
}
//Input is coming from DCMP.
//Rely on the DCMP input mux for this, nothing for us to do.
//Set the input voltage to zero just so the bitstream is deterministic.
else
{
for(unsigned int i=0; i<8; i++)
bitstream[m_cbaseReg + i] = false;
}
*/

//TODO: Do our inputs
LogError("Unimplemented\n");
return false;
75 changes: 72 additions & 3 deletions src/greenpak4/Greenpak4DigitalComparator.cpp
Original file line number Diff line number Diff line change
@@ -180,10 +180,79 @@ bool Greenpak4DigitalComparator::CommitChanges()
return true;
}

bool Greenpak4DigitalComparator::Load(bool* /*bitstream*/)
bool Greenpak4DigitalComparator::Load(bool* bitstream)
{
LogError("Unimplemented\n");
return false;
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// INPUT BUS

ReadMatrixSelector(bitstream, m_inputBaseWord, m_matrix, m_powerDown);

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// CONFIGURATION

int deadtime = (bitstream[m_configBase + 2] << 2) | (bitstream[m_configBase + 1] << 1) | bitstream[m_configBase];
m_pwmDeadband = (deadtime + 1) * 10;

//Geq/eq mode
m_compareGreaterEqual = bitstream[m_configBase + 3];

//Function select (DCMP vs PWM)
m_dcmpMode = bitstream[m_configBase + 4];

//Negative input
unsigned int insel = (bitstream[m_configBase + 4] << 1) | bitstream[m_configBase + 3];
for(auto it : m_innsels)
{
if(it.second != insel)
continue;
auto from = it.first;

for(int i=0; i<8; i++)
m_inn[i] = from;
}

//Clock source
if(bitstream[m_configBase + 5])
m_clock = m_device->GetClockBuffer(2)->GetOutput("OUT");
else
m_clock = m_device->GetClockBuffer(5)->GetOutput("OUT");

//Clock inversion
m_clockInvert = bitstream[m_configBase + 6];

//insert powerdown sync bit here for DCMP0, others don't have it
unsigned int cbase = m_configBase + 7;
if(m_cmpNum == 0)
{
m_pdSync = bitstream[m_configBase + 7];
cbase ++;
}
else
m_pdSync = false;

//Positive input
insel = (bitstream[cbase + 2] << 1) | bitstream[cbase + 1];
for(auto it : m_inpsels)
{
if(it.second != insel)
continue;
auto from = it.first;

for(int i=0; i<8; i++)
m_inp[i] = from;
}

//Enable bit (if cleared, tie off all inputs to zero)
if(!bitstream[cbase + 0])
{
for(int i=0; i<8; i++)
{
m_inp[i] = m_device->GetGround();
m_inn[i] = m_device->GetGround();
}
}

return true;
}

bool Greenpak4DigitalComparator::IsUsed()
3 changes: 3 additions & 0 deletions src/greenpak4/Greenpak4EntityOutput.h
Original file line number Diff line number Diff line change
@@ -50,6 +50,9 @@ class Greenpak4EntityOutput

Greenpak4EntityOutput GetDual();

const Greenpak4BitstreamEntity* GetRealEntity() const
{ return m_src->GetRealEntity(); }

Greenpak4BitstreamEntity* GetRealEntity()
{ return m_src->GetRealEntity(); }