fhdl/verilog: call get_ports() to get default ios

m-labs · Aug 1, 2016 · 8b64f86 · 8b64f86
1 parent 462005f
commit 8b64f86
Showing 1 changed file with 6 additions and 3 deletions.
diff --git a/migen/fhdl/verilog.py b/migen/fhdl/verilog.py
@@ -274,11 +274,14 @@ def convert(f, ios=None, name="top",
   create_clock_domains=True,
   display_run=False, asic_syntax=False):
     r = ConvOutput()
-    if not isinstance(f, _Fragment):
-        f = f.get_fragment()
     if ios is None:
-        ios = set()
+        if hasattr(f, "get_ports"):
+            ios = f.get_ports()
+        else:
+            ios = set()
     ios = set(ios)
+    if not isinstance(f, _Fragment):
+        f = f.get_fragment()
 
     for cd_name in sorted(list_clock_domains(f)):
         try: