-
Notifications
You must be signed in to change notification settings - Fork 88
Permalink
Choose a base ref
{{ refName }}
default
Choose a head ref
{{ refName }}
default
Comparing changes
Choose two branches to see what’s changed or to start a new pull request.
If you need to, you can also or
learn more about diff comparisons.
Open a pull request
Create a new pull request by comparing changes across two branches. If you need to, you can also .
Learn more about diff comparisons here.
base repository: m-labs/misoc
Failed to load repositories. Confirm that selected base ref is valid, then try again.
Loading
base: 739e41b5fe55
Could not load branches
Nothing to show
Loading
Could not load tags
Nothing to show
{{ refName }}
default
Loading
...
head repository: m-labs/misoc
Failed to load repositories. Confirm that selected head ref is valid, then try again.
Loading
compare: 504775c561fa
Could not load branches
Nothing to show
Loading
Could not load tags
Nothing to show
{{ refName }}
default
Loading
- 4 commits
- 3 files changed
- 1 contributor
Commits on Aug 25, 2016
-
Configuration menu - View commit details
-
Copy full SHA for 01fa9ad - Browse repository at this point
Copy the full SHA 01fa9adView commit details -
Configuration menu - View commit details
-
Copy full SHA for 107db16 - Browse repository at this point
Copy the full SHA 107db16View commit details -
cores/spi: adapt to new misoc API, fix tests
spi: Fix imports for testbench, new misoc API. Full test suite runs without runtime errors (some tests fail). Rework old test suite into something usable. Core passes without error.
Configuration menu - View commit details
-
Copy full SHA for 17c8fc9 - Browse repository at this point
Copy the full SHA 17c8fc9View commit details -
cores/spi: replace wb interface with csr interface
bus => wbus to prepare CSR replacement. Replace data write/data read regs with CSR equivalents. Fix combinational logic error. Convert wishbone xfer reg into CSR equivalents. Convert config register to CSR. Pending not working. Fix broken register definitions in test suite. Pending status needs to be asserted one cycle earlier so that it is valid immediately after write. Remove wishbone bus from core/test files. Variable name cleanup (Remove CSR qualifiers). User friendly register names, minor test suite reg assignment changes (does not affect results). Update/run full test suite for CSR. Core passes. Update inline documentation of SPI API. Remove wishbone import. Remove description of CSR registers. _device_sel => _cs, device_width => cs_width. Remove status record, split status reg into multiple. Remove config record, split config reg into multiple. Update reg names in Notes. Python 3.3/3.4 syntax fix for tests. Remove complex pending logic. PEP8 cleanup (If/Else statements not changed).
Configuration menu - View commit details
-
Copy full SHA for 504775c - Browse repository at this point
Copy the full SHA 504775cView commit details
There are no files selected for viewing