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base repository: timvideos/HDMI2USB-litex-firmware
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head repository: timvideos/HDMI2USB-litex-firmware
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  • 20 commits
  • 14 files changed
  • 1 contributor

Commits on Aug 8, 2016

  1. gateware/opsis: Documenting the clocking better.

    @mithro
    mithro committed Aug 8, 2016
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  2. gateware/hdmi_out: Documenting HDMI output phy clocking.

    @mithro
    mithro committed Aug 8, 2016

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  3. targets: Adding multiple timing groups. 

    This allows period constraints to propagate through PLL/DCM objects.

See http://www.xilinx.com/support/answers/37782.html
    @mithro
    mithro committed Aug 8, 2016

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  4. targets/opsis: Make the TIG stuff even clearer.

    @mithro
    mithro committed Aug 8, 2016

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  5. targets/atlys: Making same TIG changes on the Atlys.

    @mithro
    mithro committed Aug 8, 2016
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  6. targets: Removing unneeded constraints.

    @mithro
    mithro committed Aug 8, 2016
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  7. targets: Formatting fixes.

    @mithro
    mithro committed Aug 8, 2016
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  8. targets/atlys: Working on the PLL in BaseSoC.

    @mithro
    mithro committed Aug 8, 2016
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  9. targets: Disable base50 on Opsis base.

    @mithro
    mithro committed Aug 8, 2016
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  10. targets/atlys_hdmi2eth: Fixing the TIG in HDMI2Eth.

    @mithro
    mithro committed Aug 8, 2016
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  11. targets/atlys_hdmi2eth: Case fix.

    @mithro
    mithro committed Aug 8, 2016
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  12. Shortening the names a little.

    @mithro
    mithro committed Aug 8, 2016
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  13. gateware: Make HDMI output always take a clock of some sort.

    @mithro
    mithro committed Aug 8, 2016
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  14. targets: Cleaning up the clocking documentation and adding asserts.

    @mithro
    mithro committed Aug 8, 2016
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  15. targets: Fix typos.

    @mithro
    mithro committed Aug 8, 2016
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  16. targets: Small fixes.

    @mithro
    mithro committed Aug 8, 2016
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  17. gateware/hdmi_out: Shorten the names a little.

    @mithro
    mithro committed Aug 8, 2016
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  18. targets/minispartan6: Fixing minispartan6+

    @mithro
    mithro committed Aug 8, 2016
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  19. platforms: Increase timing constraints of pixel clock. 

     * 12ns == 83MHz
 * 10ns == 100MHz
    @mithro
    mithro committed Aug 8, 2016
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  20. Merge pull request #226 from mithro/opsis-timing 

    Fixing the timing propagation through PLL/DCM parts in ISE.
    @mithro
    mithro authored Aug 8, 2016
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