Add VGA module to atlys_video target #279
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VGAIn modules gives VGA capture functionality to atlys. Also, we are now inheriting BaseSoC class directly instead of MinoSoC class because VGA signals' 3.3V logic-level conflicts with ethernet's 2.5V logic-level. MiniSoC instantiates ethernet modules so we arebypassing it and inheriting BaseSoC class.
mithro
changed the title
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https://travis-ci.org/timvideos/HDMI2USB-misoc-firmware/jobs/150325487 |
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I think we should rebase this change on top of #280 |
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| def CreateVideoMixerSoC(base): | ||
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| class CustomVideoMixerSoC(base): | ||
| csr_peripherals = ( | ||
| "i2c", |
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Can you rename this to "vga_i2c"?
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Modify
atlys_videotarget to include VGAIn module.Also, we now inherit
BaseSoCexplicitly instead ofMiniSoCWarning: might affect
hdmi2eth&hdmi2usbtargets which inheritCustomVideoMixerSoCclass from this file(?) They seem to build fine though