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liteeth: clean up rgmii rx_ctl handling
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sbourdeauducq committed Aug 20, 2017
1 parent bbcf121 commit 25f9044
Showing 1 changed file with 2 additions and 5 deletions.
7 changes: 2 additions & 5 deletions misoc/cores/liteeth_mini/phy/rgmii.py
Original file line number Diff line number Diff line change
@@ -36,15 +36,12 @@ def __init__(self, pads):
ClockSignal("eth_rx"))

rx_ctl_d = Signal()
self.sync.eth_rx += rx_ctl_d.eq(rx_ctl)
eop = Signal()
self.comb += eop.eq(~rx_ctl & rx_ctl_d)

self.sync.eth_rx += [
rx_ctl_d.eq(rx_ctl),
source.stb.eq(rx_ctl),
source.data.eq(rx_data)
]
self.comb += source.eop.eq(eop)
self.comb += source.eop.eq(~rx_ctl & rx_ctl_d)


class LiteEthPHYRGMIICRG(Module, AutoCSR):

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