sayma_amc: fix FTDI UART I/O voltage

sbourdeauducq · sbourdeauducq · commit 0f78f9f75bbc · 2017-08-20T19:24:17.000-04:00
diff --git a/migen/build/platforms/sinara/sayma_amc.py b/migen/build/platforms/sinara/sayma_amc.py
@@ -13,12 +13,12 @@
     ("serial", 0,
         Subsignal("tx", Pins("AK8")),
         Subsignal("rx", Pins("AL8")),
-        IOStandard("LVCMOS18")
+        IOStandard("LVCMOS33")
     ),
     ("serial", 1,
         Subsignal("tx", Pins("M27")),
         Subsignal("rx", Pins("L27")),
-        IOStandard("LVCMOS18")
+        IOStandard("LVCMOS33")
     ),
     ("serial_rtm", 0,
         Subsignal("tx", Pins("G27")),
