sayma_rtm: add pulldowns on SPI MISO

sbourdeauducq · sbourdeauducq · commit 2e53295b89a6 · 2017-08-30T12:29:15.000+08:00
diff --git a/migen/build/platforms/sinara/sayma_rtm.py b/migen/build/platforms/sinara/sayma_rtm.py
@@ -24,8 +24,8 @@
     # HMC clocking chips (830 and 7043)
     ("hmc_spi", 0,
         Subsignal("clk", Pins("A17")),
-        Subsignal("mosi", Pins("B16"), Misc("PULLDOWN")),
-        Subsignal("miso", Pins("D9")),
+        Subsignal("mosi", Pins("B16")),
+        Subsignal("miso", Pins("D9"), Misc("PULLDOWN")),
         # cs[0]=830 cs[1]=7043
         Subsignal("cs_n", Pins("C8 D16")),
         IOStandard("LVCMOS25")
@@ -43,15 +43,15 @@
         Subsignal("clk", Pins("T13")),
         Subsignal("cs_n", Pins("U14")),
         Subsignal("mosi", Pins("V17")),
-        Subsignal("miso", Pins("R13")),
+        Subsignal("miso", Pins("R13"), Misc("PULLDOWN")),
         IOStandard("LVCMOS25")
     ),
     ("ad9154_txen", 0, Pins("V16 U16"), IOStandard("LVCMOS25")),
     ("ad9154_spi", 1,
         Subsignal("clk", Pins("J15")),
         Subsignal("cs_n", Pins("K18")),
         Subsignal("mosi", Pins("J18")),
-        Subsignal("miso", Pins("J16")),
+        Subsignal("miso", Pins("J16"), Misc("PULLDOWN")),
         IOStandard("LVCMOS25")
     ),
     ("ad9154_txen", 1, Pins("L17 L14"), IOStandard("LVCMOS25")),
