hdl/csc/rgb2ycbcr.py: fix rounding issue (still has to be understood)

timvideos · Aug 10, 2015 · 122d450 · 122d450
1 parent 0b0c125
commit 122d450
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/hdl/csc/rgb2ycbcr.py b/hdl/csc/rgb2ycbcr.py
@@ -74,7 +74,7 @@ def __init__(self, rgb_w, ycbcr_w, coef_w):
 
         # stage 3
         # ca*(r-g) + cb*(b-g)
-        carg_plus_cbbg = Signal((rgb_w + coef_w + 2, True))
+        carg_plus_cbbg = Signal((rgb_w + coef_w + 9, True)) # XXX
         self.sync += [
             carg_plus_cbbg.eq(ca_mult_rg + cb_mult_bg)
         ]