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hdl/csc/ycbcr2rgb.py: fix (simulation working)
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enjoy-digital committed Aug 10, 2015
1 parent 925b3a8 commit 0b0c125
Showing 1 changed file with 7 additions and 7 deletions.
14 changes: 7 additions & 7 deletions hdl/csc/ycbcr2rgb.py
Expand Up @@ -33,7 +33,7 @@ def ycbcr2rgb_coefs(dw, cw=None):
"dcoef": coef(1/cc, xcoef_w)
}

datapath_latency = 5
datapath_latency = 4


@DecorateModule(InsertCE)
Expand Down Expand Up @@ -76,10 +76,10 @@ def __init__(self, ycbcr_w, rgb_w, coef_w):
# (cr - coffset)*ccoef
# (cb - coffset)*dcoef
y_minus_yoffset = Signal((ycbcr_w + 1, True))
cr_minus_coffset_mult_acoef = Signal((ycbcr_w + coef_w + 1, True))
cb_minus_coffset_mult_bcoef = Signal((ycbcr_w + coef_w + 1, True))
cr_minus_coffset_mult_ccoef = Signal((ycbcr_w + coef_w + 1, True))
cb_minus_coffset_mult_dcoef = Signal((ycbcr_w + coef_w + 1, True))
cr_minus_coffset_mult_acoef = Signal((ycbcr_w + coef_w + 4, True))
cb_minus_coffset_mult_bcoef = Signal((ycbcr_w + coef_w + 4, True))
cr_minus_coffset_mult_ccoef = Signal((ycbcr_w + coef_w + 4, True))
cb_minus_coffset_mult_dcoef = Signal((ycbcr_w + coef_w + 4, True))
self.sync += [
y_minus_yoffset.eq(ycbcr_delayed[1].y - coefs["yoffset"]),
cr_minus_coffset_mult_acoef.eq(cr_minus_coffset * coefs["acoef"]),
Expand All @@ -88,7 +88,7 @@ def __init__(self, ycbcr_w, rgb_w, coef_w):
cb_minus_coffset_mult_dcoef.eq(cb_minus_coffset * coefs["dcoef"])
]

# stage 4
# stage 3
# line addition for all component
r = Signal((ycbcr_w + 4, True))
g = Signal((ycbcr_w + 4, True))
Expand All @@ -99,7 +99,7 @@ def __init__(self, ycbcr_w, rgb_w, coef_w):
b.eq(y_minus_yoffset + cb_minus_coffset_mult_dcoef[coef_w-2:])
]

# stage 5
# stage 4
# saturate
self.sync += [
saturate(r, source.r, 0, 2**rgb_w-1),
Expand Down

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