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  • 2 commits
  • 34 files changed
  • 1 contributor

Commits on Feb 22, 2016

  1. lit: unbreak on non-conda.

    whitequark committed Feb 22, 2016
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    b0e7fdd View commit details
  2. Rename 'with parallel' to 'with interleave' (#265).

    whitequark committed Feb 22, 2016

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    This commit was created on GitHub.com and signed with GitHub’s verified signature. The key has expired.
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    51a5910 View commit details
Showing with 81 additions and 80 deletions.
  1. +2 −2 artiq/compiler/builtins.py
  2. +2 −2 artiq/compiler/ir.py
  3. +1 −1 artiq/compiler/prelude.py
  4. +3 −3 artiq/compiler/transforms/artiq_ir_generator.py
  5. +2 −2 artiq/compiler/transforms/inferencer.py
  6. +6 −6 artiq/compiler/transforms/interleaver.py
  7. +4 −4 artiq/compiler/transforms/iodelay_estimator.py
  8. +4 −4 artiq/language/core.py
  9. +1 −1 artiq/test/coredevice/test_analyzer.py
  10. +1 −1 artiq/test/coredevice/test_portability.py
  11. +4 −4 artiq/test/coredevice/test_rtio.py
  12. +2 −2 artiq/test/lit/inferencer/error_with_many.py
  13. +1 −1 artiq/test/lit/inferencer/with.py
  14. +1 −1 artiq/test/lit/interleaving/control_flow.py
  15. +2 −2 artiq/test/lit/interleaving/error_inlining.py
  16. +6 −6 artiq/test/lit/interleaving/error_toplevel_control_flow.py
  17. +1 −1 artiq/test/lit/interleaving/indirect.py
  18. +1 −1 artiq/test/lit/interleaving/indirect_arg.py
  19. +1 −1 artiq/test/lit/interleaving/nonoverlapping.py
  20. +1 −1 artiq/test/lit/interleaving/overlapping.py
  21. +1 −1 artiq/test/lit/interleaving/pure_impure_tie.py
  22. +1 −1 artiq/test/lit/interleaving/unrolling.py
  23. +1 −1 artiq/test/lit/iodelay/{error_bad_parallel.py → error_bad_interleave.py}
  24. +2 −2 artiq/test/lit/iodelay/{parallel.py → interleave.py}
  25. +2 −1 artiq/test/lit/lit.cfg
  26. +1 −1 artiq/test/lit/local_access/parallel.py
  27. +7 −7 doc/manual/getting_started_core.rst
  28. +7 −7 doc/slides/artiq_overview.tex
  29. +6 −6 doc/slides/taaccs.tex
  30. +2 −2 examples/master/repository/coredevice_examples/photon_histogram.py
  31. +1 −1 examples/master/repository/coredevice_examples/simple/dds_test.py
  32. +1 −1 examples/master/repository/coredevice_examples/tdr.py
  33. +2 −2 examples/sim/al_spectroscopy.py
  34. +1 −1 examples/sim/simple_simulation.py
4 changes: 2 additions & 2 deletions artiq/compiler/builtins.py
Original file line number Diff line number Diff line change
@@ -144,8 +144,8 @@ def fn_print():
def fn_kernel():
return types.TBuiltinFunction("kernel")

def obj_parallel():
return types.TBuiltin("parallel")
def obj_interleave():
return types.TBuiltin("interleave")

def obj_sequential():
return types.TBuiltin("sequential")
4 changes: 2 additions & 2 deletions artiq/compiler/ir.py
Original file line number Diff line number Diff line change
@@ -1418,7 +1418,7 @@ def _operands_as_string(self, type_printer):
def opcode(self):
return "loop({} times)".format(self.trip_count)

class Parallel(Terminator):
class Interleave(Terminator):
"""
An instruction that schedules several threads of execution
in parallel.
@@ -1428,7 +1428,7 @@ def __init__(self, destinations, name=""):
super().__init__(destinations, builtins.TNone(), name)

def opcode(self):
return "parallel"
return "interleave"

def destinations(self):
return self.operands
2 changes: 1 addition & 1 deletion artiq/compiler/prelude.py
Original file line number Diff line number Diff line change
@@ -30,7 +30,7 @@ def globals():
"portable": builtins.fn_kernel(),

# ARTIQ context managers
"parallel": builtins.obj_parallel(),
"interleave": builtins.obj_interleave(),
"sequential": builtins.obj_sequential(),
"watchdog": builtins.fn_watchdog(),

6 changes: 3 additions & 3 deletions artiq/compiler/transforms/artiq_ir_generator.py
Original file line number Diff line number Diff line change
@@ -747,8 +747,8 @@ def visit_With(self, node):
if types.is_builtin(context_expr_node.type, "sequential"):
self.visit(node.body)
return
elif types.is_builtin(context_expr_node.type, "parallel"):
parallel = self.append(ir.Parallel([]))
elif types.is_builtin(context_expr_node.type, "interleave"):
interleave = self.append(ir.Interleave([]))

heads, tails = [], []
for stmt in node.body:
@@ -758,7 +758,7 @@ def visit_With(self, node):
tails.append(self.current_block)

for head in heads:
parallel.add_destination(head)
interleave.add_destination(head)

self.current_block = self.add_block()
for tail in tails:
4 changes: 2 additions & 2 deletions artiq/compiler/transforms/inferencer.py
Original file line number Diff line number Diff line change
@@ -993,7 +993,7 @@ def visit_withitemT(self, node):
self.generic_visit(node)

typ = node.context_expr.type
if (types.is_builtin(typ, "parallel") or types.is_builtin(typ, "sequential") or
if (types.is_builtin(typ, "interleave") or types.is_builtin(typ, "sequential") or
(isinstance(node.context_expr, asttyped.CallT) and
types.is_builtin(node.context_expr.func.type, "watchdog"))):
# builtin context managers
@@ -1092,7 +1092,7 @@ def visit_With(self, node):

for item_node in node.items:
typ = item_node.context_expr.type.find()
if (types.is_builtin(typ, "parallel") or types.is_builtin(typ, "sequential")) and \
if (types.is_builtin(typ, "interleave") or types.is_builtin(typ, "sequential")) and \
len(node.items) != 1:
diag = diagnostic.Diagnostic("error",
"the '{kind}' context manager must be the only one in a 'with' statement",
12 changes: 6 additions & 6 deletions artiq/compiler/transforms/interleaver.py
Original file line number Diff line number Diff line change
@@ -66,7 +66,7 @@ def process_function(self, func):

postdom_tree = None
for insn in func.instructions():
if not isinstance(insn, ir.Parallel):
if not isinstance(insn, ir.Interleave):
continue

# Lazily compute dominators.
@@ -79,15 +79,15 @@ def process_function(self, func):
source_times = [0 for _ in source_blocks]

if len(source_blocks) == 1:
# Immediate dominator for a parallel instruction with one successor
# Immediate dominator for a interleave instruction with one successor
# is the first instruction in the body of the statement which created
# it, but below we expect that it would be the first instruction after
# the statement itself.
insn.replace_with(ir.Branch(source_blocks[0]))
continue

interleave_until = postdom_tree.immediate_dominator(insn.basic_block)
assert interleave_until is not None # no nonlocal flow in `with parallel`
assert interleave_until is not None # no nonlocal flow in `with interleave`
assert interleave_until not in source_blocks

while len(source_blocks) > 0:
@@ -111,15 +111,15 @@ def time_after_block(pair):
assert target_time_delta >= 0

target_terminator = target_block.terminator()
if isinstance(target_terminator, ir.Parallel):
if isinstance(target_terminator, ir.Interleave):
target_terminator.replace_with(ir.Branch(source_block))
elif isinstance(target_terminator, (ir.Delay, ir.Branch)):
target_terminator.set_target(source_block)
else:
assert False

source_terminator = source_block.terminator()
if isinstance(source_terminator, ir.Parallel):
if isinstance(source_terminator, ir.Interleave):
source_terminator.replace_with(ir.Branch(source_terminator.target()))
elif isinstance(source_terminator, ir.Branch):
pass
@@ -149,7 +149,7 @@ def time_after_block(pair):
if old_decomp.static_target_function is None:
diag = diagnostic.Diagnostic("fatal",
"it is not possible to interleave this function call within "
"a 'with parallel:' statement because the compiler could not "
"a 'with interleave:' statement because the compiler could not "
"prove that the same function would always be called", {},
old_decomp.loc)
self.engine.process(diag)
8 changes: 4 additions & 4 deletions artiq/compiler/transforms/iodelay_estimator.py
Original file line number Diff line number Diff line change
@@ -219,7 +219,7 @@ def visit_With(self, node):
self.visit(node.items)

context_expr = node.items[0].context_expr
if len(node.items) == 1 and types.is_builtin(context_expr.type, "parallel"):
if len(node.items) == 1 and types.is_builtin(context_expr.type, "interleave"):
try:
delays = []
for stmt in node.body:
@@ -235,7 +235,7 @@ def visit_With(self, node):
# since there's no chance that the code will never actually execute
# inside a `with` statement after all.
note = diagnostic.Diagnostic("note",
"while interleaving this 'with parallel:' statement", {},
"while interleaving this 'with interleave:' statement", {},
node.loc)
error.cause.notes += [note]
self.engine.process(error.cause)
@@ -249,11 +249,11 @@ def visit_With(self, node):
if flow_stmt is not None:
note = diagnostic.Diagnostic("note",
"this '{kind}' statement transfers control out of "
"the 'with parallel:' statement",
"the 'with interleave:' statement",
{"kind": flow_stmt.keyword_loc.source()},
flow_stmt.loc)
diag = diagnostic.Diagnostic("error",
"cannot interleave this 'with parallel:' statement", {},
"cannot interleave this 'with interleave:' statement", {},
node.keyword_loc.join(node.colon_loc), notes=[note])
self.engine.process(diag)

8 changes: 4 additions & 4 deletions artiq/language/core.py
Original file line number Diff line number Diff line change
@@ -13,7 +13,7 @@

# global namespace for kernels
kernel_globals = (
"sequential", "parallel",
"sequential", "parallel", "interleave",
"delay_mu", "now_mu", "at_mu", "delay",
"seconds_to_mu", "mu_to_seconds",
"watchdog"
@@ -264,7 +264,7 @@ def _not_implemented(self, *args, **kwargs):
def set_time_manager(time_manager):
"""Set the time manager used for simulating kernels by running them
directly inside the Python interpreter. The time manager responds to the
entering and leaving of parallel/sequential blocks, delays, etc. and
entering and leaving of interleave/parallel/sequential blocks, delays, etc. and
provides a time-stamped logging facility for events.
"""
global _time_manager
@@ -288,15 +288,15 @@ class _Parallel:
The execution time of a parallel block is the execution time of its longest
statement. A parallel block may contain sequential blocks, which themselves
may contain parallel blocks, etc.
may contain interleave blocks, etc.
"""
def __enter__(self):
_time_manager.enter_parallel()

def __exit__(self, type, value, traceback):
_time_manager.exit()
parallel = _Parallel()

interleave = _Parallel() # no difference in semantics on host

def delay_mu(duration):
"""Increases the RTIO time by the given amount (in machine units)."""
2 changes: 1 addition & 1 deletion artiq/test/coredevice/test_analyzer.py
Original file line number Diff line number Diff line change
@@ -12,7 +12,7 @@ def build(self):
def run(self):
self.ttl_inout.output()
delay_mu(100)
with parallel:
with interleave:
self.ttl_inout.gate_both_mu(1200)
with sequential:
delay_mu(100)
2 changes: 1 addition & 1 deletion artiq/test/coredevice/test_portability.py
Original file line number Diff line number Diff line change
@@ -100,7 +100,7 @@ def build(self):
@kernel
def run(self):
for i in range(3):
with parallel:
with interleave:
with sequential:
self.a.pulse(100+i, 20*us)
self.b.pulse(200+i, 20*us)
8 changes: 4 additions & 4 deletions artiq/test/coredevice/test_rtio.py
Original file line number Diff line number Diff line change
@@ -16,7 +16,7 @@ def build(self):
def run(self):
self.ttl_inout.output()
delay(1*us)
with parallel:
with interleave:
# make sure not to send two commands into the same RTIO
# channel with the same timestamp
self.ttl_inout.gate_rising(5*us)
@@ -37,7 +37,7 @@ def build(self):
def run(self):
self.loop_in.input()
delay(1*us)
with parallel:
with interleave:
self.loop_in.gate_rising(2*us)
with sequential:
delay(1*us)
@@ -57,7 +57,7 @@ def run(self):
self.loop_clock_in.input()
self.loop_clock_out.stop()
delay(1*us)
with parallel:
with interleave:
self.loop_clock_in.gate_rising(10*us)
with sequential:
delay(200*ns)
@@ -110,7 +110,7 @@ def set_count(self, count):
def run(self):
self.ttl_inout.output()
delay(5*us)
with parallel:
with interleave:
self.ttl_inout.gate_rising(10*us)
with sequential:
for i in range(self.npulses):
4 changes: 2 additions & 2 deletions artiq/test/lit/inferencer/error_with_many.py
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
# RUN: %python -m artiq.compiler.testbench.inferencer +diag %s >%t
# RUN: OutputCheck %s --file-to-check=%t

# CHECK-L: ${LINE:+1}: error: the 'parallel' context manager must be the only one in a 'with' statement
with parallel, sequential:
# CHECK-L: ${LINE:+1}: error: the 'interleave' context manager must be the only one in a 'with' statement
with interleave, sequential:
pass
2 changes: 1 addition & 1 deletion artiq/test/lit/inferencer/with.py
Original file line number Diff line number Diff line change
@@ -2,4 +2,4 @@
# RUN: OutputCheck %s --file-to-check=%t

# CHECK-L: as x:NoneType
with parallel as x: pass
with interleave as x: pass
2 changes: 1 addition & 1 deletion artiq/test/lit/interleaving/control_flow.py
Original file line number Diff line number Diff line change
@@ -2,7 +2,7 @@
# RUN: OutputCheck %s --file-to-check=%t

def f():
with parallel:
with interleave:
if True:
print(1)
else:
4 changes: 2 additions & 2 deletions artiq/test/lit/interleaving/error_inlining.py
Original file line number Diff line number Diff line change
@@ -10,7 +10,7 @@ def g():
x = f if True else g

def h():
with parallel:
with interleave:
f()
# CHECK-L: ${LINE:+1}: fatal: it is not possible to interleave this function call within a 'with parallel:' statement because the compiler could not prove that the same function would always be called
# CHECK-L: ${LINE:+1}: fatal: it is not possible to interleave this function call within a 'with interleave:' statement because the compiler could not prove that the same function would always be called
x()
12 changes: 6 additions & 6 deletions artiq/test/lit/interleaving/error_toplevel_control_flow.py
Original file line number Diff line number Diff line change
@@ -2,16 +2,16 @@
# RUN: OutputCheck %s --file-to-check=%t

def f():
# CHECK-L: ${LINE:+1}: error: cannot interleave this 'with parallel:' statement
with parallel:
# CHECK-L: ${LINE:+1}: note: this 'return' statement transfers control out of the 'with parallel:' statement
# CHECK-L: ${LINE:+1}: error: cannot interleave this 'with interleave:' statement
with interleave:
# CHECK-L: ${LINE:+1}: note: this 'return' statement transfers control out of the 'with interleave:' statement
return
delay(1.0)

def g():
while True:
# CHECK-L: ${LINE:+1}: error: cannot interleave this 'with parallel:' statement
with parallel:
# CHECK-L: ${LINE:+1}: note: this 'break' statement transfers control out of the 'with parallel:' statement
# CHECK-L: ${LINE:+1}: error: cannot interleave this 'with interleave:' statement
with interleave:
# CHECK-L: ${LINE:+1}: note: this 'break' statement transfers control out of the 'with interleave:' statement
break
delay(1.0)
2 changes: 1 addition & 1 deletion artiq/test/lit/interleaving/indirect.py
Original file line number Diff line number Diff line change
@@ -5,7 +5,7 @@ def f():
delay_mu(2)

def g():
with parallel:
with interleave:
with sequential:
print("A", now_mu())
f()
2 changes: 1 addition & 1 deletion artiq/test/lit/interleaving/indirect_arg.py
Original file line number Diff line number Diff line change
@@ -5,7 +5,7 @@ def f(n):
delay_mu(n)

def g():
with parallel:
with interleave:
with sequential:
print("A", now_mu())
f(2)
2 changes: 1 addition & 1 deletion artiq/test/lit/interleaving/nonoverlapping.py
Original file line number Diff line number Diff line change
@@ -2,7 +2,7 @@
# RUN: OutputCheck %s --file-to-check=%t

def g():
with parallel:
with interleave:
with sequential:
print("A", now_mu())
delay_mu(2)
2 changes: 1 addition & 1 deletion artiq/test/lit/interleaving/overlapping.py
Original file line number Diff line number Diff line change
@@ -2,7 +2,7 @@
# RUN: OutputCheck %s --file-to-check=%t

def g():
with parallel:
with interleave:
with sequential:
print("A", now_mu())
delay_mu(3)
2 changes: 1 addition & 1 deletion artiq/test/lit/interleaving/pure_impure_tie.py
Original file line number Diff line number Diff line change
@@ -5,7 +5,7 @@ def f():
delay_mu(2)

def g():
with parallel:
with interleave:
f()
delay_mu(2)
print(now_mu())
2 changes: 1 addition & 1 deletion artiq/test/lit/interleaving/unrolling.py
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
# RUN: %python -m artiq.compiler.testbench.jit %s >%t
# RUN: OutputCheck %s --file-to-check=%t

with parallel:
with interleave:
for x in range(10):
delay_mu(1)
print("a", x)
Original file line number Diff line number Diff line change
@@ -2,7 +2,7 @@
# RUN: OutputCheck %s --file-to-check=%t

def f():
with parallel:
with interleave:
# CHECK-L: ${LINE:+1}: error: while statement cannot be interleaved
while True:
delay_mu(1)
Original file line number Diff line number Diff line change
@@ -3,13 +3,13 @@

# CHECK-L: f: (a:int(width=64), b:int(width=64))->NoneType delay(max(a, b) mu)
def f(a, b):
with parallel:
with interleave:
delay_mu(a)
delay_mu(b)

# CHECK-L: g: (a:int(width=64))->NoneType delay(max(a, 200) mu)
def g(a):
with parallel:
with interleave:
delay_mu(100)
delay_mu(200)
delay_mu(a)
3 changes: 2 additions & 1 deletion artiq/test/lit/lit.cfg
Original file line number Diff line number Diff line change
@@ -19,7 +19,8 @@ else:
python = sys.executable
config.substitutions.append( ("%python", python) )

config.environment["PYTHONPATH"] = os.getenv("PYTHONPATH")
if os.getenv("PYTHONPATH"):
config.environment["PYTHONPATH"] = os.getenv("PYTHONPATH")

not_ = "{} {}".format(sys.executable, os.path.join(root, "not.py"))
config.substitutions.append( ("%not", not_) )
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