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base repository: m-labs/artiq
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compare: 739568fcb8c3
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  • 2 commits
  • 2 files changed
  • 1 contributor

Commits on Mar 7, 2016

  1. test_loopback: bump RTT limit to 60ns. 

    Turns out a short jumper wire on a backplane leads to RTT of 50ns
exactly.
    whitequark committed Mar 7, 2016
    Copy the full SHA
    9ffa8cb View commit details

  2. runtime: fix sloppy memory management in cache_put.

    whitequark committed Mar 7, 2016
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    739568f View commit details
Showing with 6 additions and 4 deletions.
  1. +5 −3 artiq/runtime/session.c
  2. +1 −1 artiq/test/coredevice/test_rtio.py
8 changes: 5 additions & 3 deletions artiq/runtime/session.c
View file
Original file line number Diff line number Diff line change
@@ -1027,7 +1027,6 @@ static int process_kmsg(struct msg_base *umsg)
struct cache_row *row = NULL;
for(struct cache_row *iter = cache; iter; iter = iter->next) {
if(!strcmp(iter->key, request->key)) {
free(iter->elements);
row = iter;
break;
}
@@ -1042,11 +1041,14 @@ static int process_kmsg(struct msg_base *umsg)
}

if(!row->borrowed) {
if(request->length != 0) {
row->length = request->length;
row->length = request->length;
if(row->length != 0) {
row->elements = calloc(row->length, sizeof(int32_t));
memcpy(row->elements, request->elements,
sizeof(int32_t) * row->length);
} else {
free(row->elements);
row->elements = NULL;
}

reply.succeeded = 1;
2 changes: 1 addition & 1 deletion artiq/test/coredevice/test_rtio.py
View file
Original file line number Diff line number Diff line change
@@ -192,7 +192,7 @@ def test_loopback(self):
rtt = self.dataset_mgr.get("rtt")
print(rtt)
self.assertGreater(rtt, 0*ns)
self.assertLess(rtt, 50*ns)
self.assertLess(rtt, 60*ns)

def test_clock_generator_loopback(self):
self.execute(ClockGeneratorLoopback)