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base repository: m-labs/artiq
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head repository: m-labs/artiq
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compare: eb2ec40b3aa9
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  • 2 commits
  • 1 file changed
  • 1 contributor

Commits on Mar 4, 2016

  1. ad5360: add busy and update timings

    @jordens
    jordens committed Mar 4, 2016
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    725943f View commit details

  2. ad5360: un-factor write_channels

    @jordens
    jordens committed Mar 4, 2016
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    eb2ec40 View commit details
Showing with 16 additions and 14 deletions.
  1. +16 −14 artiq/coredevice/ad5360.py
30 changes: 16 additions & 14 deletions artiq/coredevice/ad5360.py
View file
Original file line number Diff line number Diff line change
@@ -1,4 +1,6 @@
from artiq.language.core import kernel, portable, delay_mu
from artiq.language.core import (kernel, portable, delay_mu, delay,
seconds_to_mu)
from artiq.language.units import ns, us
from artiq.coredevice import spi

# Designed from the data sheets and somewhat after the linux kernel
@@ -48,8 +50,7 @@ def __init__(self, dmgr, spi_device, ldac_device=None, chip_select=1):
self.core = dmgr.get("core")
self.bus = dmgr.get(spi_device)
if ldac_device is not None:
ldac = dmgr.get(ldac_device)
self.ldac = ldac
self.ldac = dmgr.get(ldac_device)
self.chip_select = chip_select

@kernel
@@ -76,11 +77,6 @@ def write_channel(self, channel=0, value=0, op=_AD5360_CMD_DATA):
value &= 0xffff
self.write(op | _AD5360_WRITE_CHANNEL(channel) | value)

@kernel
def write_channels(self, values, op=_AD5360_CMD_DATA):
for i in range(len(values)):
self.write_channel(i, values[i], op)

@kernel
def read_channel_sync(self, channel=0, op=_AD5360_READ_X1A):
channel &= 0x3f
@@ -95,17 +91,23 @@ def read_channel_sync(self, channel=0, op=_AD5360_READ_X1A):
@kernel
def load(self):
self.ldac.off()
delay_mu(3*self.bus.ref_period_mu)
# t13 = 10ns ldac pulse width low
delay_mu(2*self.bus.ref_period_mu)
self.ldac.on()

@kernel
def set(self, values, op=_AD5360_CMD_DATA):
# write() compensation
# compensate all delays that will be applied
delay_mu(-len(values)*(self.bus.xfer_period_mu +
self.bus.write_period_mu +
self.bus.ref_period_mu) -
3*self.bus.ref_period_mu) # latency alignment
self.write_channels(values, op)
delay_mu(3*self.bus.ref_period_mu) # latency alignment
3*self.bus.ref_period_mu -
seconds_to_mu(1.5*us) -
seconds_to_mu(3*us))
for i in range(len(values)):
self.write_channel(i, values[i], op)
delay_mu(3*self.bus.ref_period_mu + # latency alignment ttl to spi
seconds_to_mu(1.5*us)) # t10 max busy low for one channel
self.load()
delay_mu(-3*self.bus.ref_period_mu) # load() compensation
delay_mu(-2*self.bus.ref_period_mu + # load(), t13
seconds_to_mu(3*us)) # t16 dac response time