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base repository: m-labs/artiq
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compare: e8b59b00f650
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  • 2 commits
  • 4 files changed
  • 1 contributor

Commits on Mar 6, 2016

  1. doc/PCA9548: clarify channel selection

    @sbourdeauducq
    sbourdeauducq committed Mar 6, 2016
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    c73b080 View commit details

  2. soc: use add_extra_software_packages, factor builder code

    @sbourdeauducq
    sbourdeauducq committed Mar 6, 2016
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    e8b59b0 View commit details
Showing with 23 additions and 19 deletions.
  1. +2 −1 artiq/coredevice/i2c.py
  2. +13 −0 artiq/gateware/soc.py
  3. +3 −9 artiq/gateware/targets/kc705.py
  4. +5 −9 artiq/gateware/targets/pipistrello.py
3 changes: 2 additions & 1 deletion artiq/coredevice/i2c.py
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Original file line number Diff line number Diff line change
@@ -43,7 +43,8 @@ def __init__(self, dmgr, busno=0, address=0xe8):
def set(self, channel):
"""Select one channel.
Selecting multiple channels is not supported by this driver.
Selecting multiple channels at the same time is not supported by this
driver.
:param channel: channel number (0-7)
"""
13 changes: 13 additions & 0 deletions artiq/gateware/soc.py
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Original file line number Diff line number Diff line change
@@ -1,8 +1,12 @@
import os

from misoc.integration.soc_core import mem_decoder
from misoc.cores import timer
from misoc.interconnect import wishbone
from misoc.integration.builder import *

from artiq.gateware import amp
from artiq import __artiq_dir__ as artiq_dir


class AMPSoC:
@@ -46,3 +50,12 @@ def register_kernel_cpu_csrdevice(self, name):
self.add_csr_region(name,
self.mem_map[name] | 0x80000000, 32,
csrs)


def build_artiq_soc(soc, argdict):
builder = Builder(soc, **argdict)
builder.add_extra_software_packages()
builder.add_software_package("liblwip", os.path.join(artiq_dir, "runtime",
"liblwip"))
builder.add_software_package("runtime", os.path.join(artiq_dir, "runtime"))
builder.build()
12 changes: 3 additions & 9 deletions artiq/gateware/targets/kc705.py
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Original file line number Diff line number Diff line change
@@ -1,7 +1,6 @@
#!/usr/bin/env python3.5

import argparse
import os

from migen import *
from migen.genlib.resetsync import AsyncResetSynchronizer
@@ -15,13 +14,12 @@
from misoc.interconnect import wishbone
from misoc.cores import gpio
from misoc.integration.soc_core import mem_decoder
from misoc.integration.builder import *
from misoc.targets.kc705 import MiniSoC, soc_kc705_args, soc_kc705_argdict
from misoc.integration.builder import builder_args, builder_argdict

from artiq.gateware.soc import AMPSoC
from artiq.gateware.soc import AMPSoC, build_artiq_soc
from artiq.gateware import rtio, nist_qc1, nist_clock, nist_qc2
from artiq.gateware.rtio.phy import ttl_simple, ttl_serdes_7series, dds, spi
from artiq import __artiq_dir__ as artiq_dir
from artiq import __version__ as artiq_version


@@ -375,11 +373,7 @@ def main():
sys.exit(1)

soc = cls(**soc_kc705_argdict(args))
builder = Builder(soc, **builder_argdict(args))
builder.add_software_package("liblwip", os.path.join(artiq_dir, "runtime",
"liblwip"))
builder.add_software_package("runtime", os.path.join(artiq_dir, "runtime"))
builder.build()
build_artiq_soc(soc, builder_argdict(args))


if __name__ == "__main__":
14 changes: 5 additions & 9 deletions artiq/gateware/targets/pipistrello.py
View file
Original file line number Diff line number Diff line change
@@ -4,7 +4,6 @@
# Copyright (C) 2014, 2015 M-Labs Limited

import argparse
import os
from fractions import Fraction

from migen import *
@@ -15,12 +14,13 @@
from misoc.interconnect import wishbone
from misoc.cores import gpio
from misoc.integration.soc_core import mem_decoder
from misoc.targets.pipistrello import *
from misoc.targets.pipistrello import (BaseSoC, soc_pipistrello_args,
soc_pipistrello_argdict)
from misoc.integration.builder import builder_args, builder_argdict

from artiq.gateware.soc import AMPSoC
from artiq.gateware.soc import AMPSoC, build_artiq_soc
from artiq.gateware import rtio, nist_qc1
from artiq.gateware.rtio.phy import ttl_simple, ttl_serdes_spartan6, dds, spi
from artiq import __artiq_dir__ as artiq_dir
from artiq import __version__ as artiq_version


@@ -228,11 +228,7 @@ def main():
args = parser.parse_args()

soc = NIST_QC1(**soc_pipistrello_argdict(args))
builder = Builder(soc, **builder_argdict(args))
builder.add_software_package("liblwip", os.path.join(artiq_dir, "runtime",
"liblwip"))
builder.add_software_package("runtime", os.path.join(artiq_dir, "runtime"))
builder.build()
build_artiq_soc(soc, builder_argdict(args))


if __name__ == "__main__":