coredevice/TTLOut: add dummy output function

m-labs · Mar 1, 2016 · c7d48a1 · c7d48a1
1 parent 18efca0
commit c7d48a1
Showing 2 changed files with 5 additions and 0 deletions.
diff --git a/artiq/coredevice/ttl.py b/artiq/coredevice/ttl.py
@@ -37,6 +37,10 @@ def __init__(self, dmgr, channel):
         # in RTIO cycles
         self.o_previous_timestamp = int(0, width=64)
 
+    @kernel
+    def output(self):
+        pass
+
     @kernel
     def set_o(self, o):
         ttl_set_o(now_mu(), self.channel, o)

diff --git a/artiq/test/coredevice/test_rtio.py b/artiq/test/coredevice/test_rtio.py
@@ -8,6 +8,7 @@
 from artiq.experiment import *
 from artiq.test.hardware_testbench import ExperimentCase
 
+
 artiq_low_latency = os.getenv("ARTIQ_LOW_LATENCY")
Original file line number	Diff line number	Diff line change
		@@ -8,6 +8,7 @@
		from artiq.experiment import *
		from artiq.test.hardware_testbench import ExperimentCase


		artiq_low_latency = os.getenv("ARTIQ_LOW_LATENCY")