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Commits on Nov 29, 2016

  1. artiq_devtool: fix incorrect use of nargs in argparse.

    whitequark committed Nov 29, 2016
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  3. phaser/demo: update

    jordens committed Nov 29, 2016
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  6. sawg: artiq-python changes

    jordens committed Nov 29, 2016
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  7. sawg: work around #632

    jordens committed Nov 29, 2016
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  10. sawg: rtio_output_wide

    jordens committed Nov 29, 2016
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  11. sawg: int32 artiq python

    jordens committed Nov 29, 2016
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  13. sawg: style

    jordens committed Nov 29, 2016
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  15. sawg: extend unittests

    jordens committed Nov 29, 2016
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  16. Revert "sawg: test w/o discrete_compensate"

    This reverts commit b736dd0.
    jordens committed Nov 29, 2016
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Commits on Nov 30, 2016

  1. sawg: cleanup

    jordens committed Nov 30, 2016
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Commits on Dec 1, 2016

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  3. sawg: merge set/set64

    jordens committed Dec 1, 2016
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Commits on Dec 2, 2016

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  2. Merge remote-tracking branch 'm-labs/phaser2' into phaser2

    * m-labs/phaser2:
      phaser: fix typo
    jordens committed Dec 2, 2016
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  3. Merge branch 'master' into phaser2

    * master:
      dashboard: mention disable in CCB policies
      runtime: clear async RPC queue when kernel stops (fixes #631).
      artiq_devtool: fix incorrect use of nargs in argparse.
    jordens committed Dec 2, 2016
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5 changes: 3 additions & 2 deletions artiq/coredevice/rtio.py
Original file line number Diff line number Diff line change
@@ -3,12 +3,13 @@


@syscall(flags={"nowrite"})
def rtio_output(time_mu: TInt64, channel: TInt32, addr: TInt32, data: TInt32) -> TNone:
def rtio_output(time_mu: TInt64, channel: TInt32, addr: TInt32, data: TInt32
) -> TNone:
raise NotImplementedError("syscall not simulated")


@syscall(flags={"nowrite"})
def rtio_output_list(time_mu: TInt64, channel: TInt32, addr: TInt32,
def rtio_output_wide(time_mu: TInt64, channel: TInt32, addr: TInt32,
data: TList(TInt32)) -> TNone:
raise NotImplementedError("syscall not simulated")

115 changes: 63 additions & 52 deletions artiq/coredevice/sawg.py
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
from numpy import int32, int64
from artiq.language.core import kernel, now_mu, portable, delay
from artiq.coredevice.rtio import rtio_output, rtio_output_list
from artiq.language.types import TInt32, TInt64, TFloat, TList
from artiq.coredevice.rtio import rtio_output, rtio_output_wide
from artiq.language.types import TInt32, TInt64, TFloat


class Spline:
@@ -18,16 +18,15 @@ def __init__(self, width, time_width, channel, core_device, scale=1.):

@portable(flags={"fast-math"})
def to_mu(self, value: TFloat) -> TInt32:
return int(round(value*self.scale))
return int32(round(value*self.scale))

@portable(flags={"fast-math"})
def from_mu(self, value: TInt32) -> TFloat:
return value/self.scale

@portable(flags={"fast-math"})
def to_mu64(self, value: TFloat) -> TList(TInt32):
v = int64(round(value*self.scale))
return [int32(v), int32((v >> 32) & 0xffffffff)]
def to_mu64(self, value: TFloat) -> TInt64:
return int64(round(value*self.scale))

@kernel
def set_mu(self, value: TInt32):
@@ -37,81 +36,93 @@ def set_mu(self, value: TInt32):
"""
rtio_output(now_mu(), self.channel, 0, value)

@kernel
@kernel(flags={"fast-math"})
def set(self, value: TFloat):
"""Set spline value.
:param value: Spline value relative to full-scale.
"""
rtio_output(now_mu(), self.channel, 0, self.to_mu(value))

@kernel
def set64(self, value: TFloat):
"""Set spline value.
:param value: Spline value relative to full-scale.
"""
rtio_output_list(now_mu(), self.channel, 0, self.to_mu64(value))
if self.width > 32:
l = [int32(0)] * 2
self.pack_coeff_mu([self.to_mu64(value)], l)
rtio_output_wide(now_mu(), self.channel, 0, l)
else:
rtio_output(now_mu(), self.channel, 0, self.to_mu(value))

@kernel
def set_list_mu(self, value: TList(TInt32)):
def set_coeff_mu(self, value): # TList(TInt32)
"""Set spline raw values.
:param value: Spline packed raw values.
"""
rtio_output_list(now_mu(), self.channel, 0, value)
rtio_output_wide(now_mu(), self.channel, 0, value)

@portable(flags={"fast-math"})
def pack_coeff_mu(self, coeff: TList(TInt64)) -> TList(TInt32):
n = len(coeff)
width = n*self.width + (n - 1)*n//2*self.time_width
packed = [int32(0)] * ((width + 31)//32)
def pack_coeff_mu(self, coeff, packed): # TList(TInt64), TList(TInt32)
pos = 0
for i in range(n):
for i in range(len(coeff)):
wi = self.width + i*self.time_width
ci = coeff[i]
while wi:
while wi != 0:
j = pos//32
used = pos - 32*j
avail = 32 - used
if avail > wi:
avail = wi
packed[j] |= (ci & ((1 << avail) - 1)) << used
cij = int32(ci)
if avail != 32:
cij &= (1 << avail) - 1
packed[j] |= cij << used
ci >>= avail
wi -= avail
pos += avail
return packed

@portable(flags={"fast-math"})
def coeff_to_mu(self, coeff: TList(TFloat)) -> TList(TInt32):
n = len(coeff)
coeff64 = [int64(0)] * n
for i in range(n):
def coeff_to_mu(self, coeff, coeff64): # TList(TFloat), TList(TInt64)
for i in range(len(coeff)):
vi = coeff[i] * self.scale
for j in range(i):
vi *= self.time_scale
vi = int(round(vi))
coeff64[i] = vi
ci = int64(round(vi))
coeff64[i] = ci
# artiq.wavesynth.coefficients.discrete_compensate:
continue
if i == 2:
coeff64[1] += vi >> (self.time_width + 1)
coeff64[1] += ci >> self.time_width + 1
elif i == 3:
coeff64[2] += vi >> self.time_width
coeff64[1] += (vi // 3) >> (2*self.time_width + 1)
return self.pack_coeff_mu(coeff64)
coeff64[2] += ci >> self.time_width
coeff64[1] += ci // 6 >> 2*self.time_width

@kernel
def set_list(self, value: TList(TFloat)):
def coeff_as_packed_mu(self, coeff64):
n = len(coeff64)
width = n*self.width + (n - 1)*n//2*self.time_width
packed = [int32(0)] * ((width + 31)//32)
self.pack_coeff_mu(coeff64, packed)
return packed

def coeff_as_packed(self, coeff):
coeff64 = [int64(0)] * len(coeff)
self.coeff_to_mu(coeff, coeff64)
return self.coeff_as_packed_mu(coeff64)

@kernel(flags={"fast-math"})
def set_coeff(self, coeff): # TList(TFloat)
"""Set spline coefficients.
:param value: List of floating point spline knot coefficients,
lowest order (constant) coefficient first.
lowest order (constant) coefficient first. Units are the
unit of this spline's value times increasing powers of 1/s.
"""
self.set_list_mu(self.coeff_to_mu(value))
n = len(coeff)
coeff64 = [int64(0)] * n
self.coeff_to_mu(coeff, coeff64)
width = n*self.width + (n - 1)*n//2*self.time_width
packed = [int32(0)] * ((width + 31)//32)
self.pack_coeff_mu(coeff64, packed)
self.set_coeff_mu(packed)

@kernel(flags={"fast-math"})
def smooth(self, start, stop, duration, order):
def smooth(self, start: TFloat, stop: TFloat, duration: TFloat,
order: TInt32):
"""Initiate an interpolated value change.
The third order interpolation is constrained to have zero first
@@ -132,15 +143,15 @@ def smooth(self, start, stop, duration, order):
and 3 are valid: step, linear, cubic.
"""
if order == 0:
delay(duration/2)
self.set_list([stop])
delay(duration/2)
delay(duration/2.)
self.set_coeff([stop])
delay(duration/2.)
elif order == 1:
self.set_list([start, (stop - start)/duration])
self.set_coeff([start, (stop - start)/duration])
delay(duration)
elif order == 3:
v2 = 6*(stop - start)/(duration*duration)
self.set_list([start, 0., v2, -2*v2/duration])
v2 = 6.*(stop - start)/(duration*duration)
self.set_coeff([start, 0., v2, -2.*v2/duration])
delay(duration)
else:
raise ValueError("Invalid interpolation order. "
@@ -153,14 +164,14 @@ class SAWG:
oscillators = exp(2j*pi*(frequency0*t + phase0))*(
amplitude1*exp(2j*pi*(frequency1*t + phase1)) +
amplitude2*exp(2j*pi*(frequency2*t + phase2))
amplitude2*exp(2j*pi*(frequency2*t + phase2)))
output = (offset +
i_enable*Re(oscillators) +
q_enable*Im(buddy_oscillators))
Where:
* offset, amplitude1, amplitude1: in units of full scale
* offset, amplitude1, amplitude2: in units of full scale
* phase0, phase1, phase2: in units of turns
* frequency0, frequency1, frequency2: in units of Hz
@@ -184,13 +195,13 @@ def __init__(self, dmgr, channel_base, parallelism, core_device="core"):
self.amplitude1 = Spline(width, time_width, channel_base + 2,
self.core, 1/(2*cordic_gain**2))
self.frequency1 = Spline(3*width, time_width, channel_base + 3,
self.core, 1/self.core.coarse_ref_period)
self.core, self.core.coarse_ref_period)
self.phase1 = Spline(width, time_width, channel_base + 4,
self.core, 1.)
self.amplitude2 = Spline(width, time_width, channel_base + 5,
self.core, 1/(2*cordic_gain**2))
self.frequency2 = Spline(3*width, time_width, channel_base + 6,
self.core, 1/self.core.coarse_ref_period)
self.core, self.core.coarse_ref_period)
self.phase2 = Spline(width, time_width, channel_base + 7,
self.core, 1.)
self.frequency0 = Spline(2*width, time_width, channel_base + 8,
4 changes: 2 additions & 2 deletions artiq/dashboard/applets_ccb.py
Original file line number Diff line number Diff line change
@@ -34,7 +34,7 @@ def __init__(self, *args, **kwargs):
self.ccbp_group_create.triggered.connect(lambda: self.set_ccbp("create"))
ccbp_group_menu.addAction(self.ccbp_group_create)
actiongroup.addAction(self.ccbp_group_create)
self.ccbp_group_enable = QtWidgets.QAction("Create and enable applets",
self.ccbp_group_enable = QtWidgets.QAction("Create and enable/disable applets",
self.table)
self.ccbp_group_enable.setCheckable(True)
self.ccbp_group_enable.triggered.connect(lambda: self.set_ccbp("enable"))
@@ -57,7 +57,7 @@ def __init__(self, *args, **kwargs):
self.ccbp_global_create.setChecked(True)
ccbp_global_menu.addAction(self.ccbp_global_create)
actiongroup.addAction(self.ccbp_global_create)
self.ccbp_global_enable = QtWidgets.QAction("Create and enable applets",
self.ccbp_global_enable = QtWidgets.QAction("Create and enable/disable applets",
self.table)
self.ccbp_global_enable.setCheckable(True)
ccbp_global_menu.addAction(self.ccbp_global_enable)
38 changes: 19 additions & 19 deletions artiq/examples/phaser/repository/demo.py
Original file line number Diff line number Diff line change
@@ -18,33 +18,33 @@ def run(self):
self.ttl_sma.output()

while True:
self.sawg0.set_amplitude(0.)
self.sawg0.set_frequency(0*MHz)
self.sawg1.set_amplitude(0.)
self.sawg1.set_frequency(0*MHz)
self.sawg0.amplitude1.set(0.)
self.sawg0.frequency0.set(0*MHz)
self.sawg1.amplitude1.set(0.)
self.sawg1.frequency0.set(0*MHz)
delay(20*ms)

self.sawg0.set_amplitude(.4)
self.sawg0.set_frequency(10*MHz)
self.sawg0.set_phase(0.)
self.sawg1.set_amplitude(.4)
self.sawg1.set_frequency(10*MHz)
self.sawg1.set_phase(0.)
self.sawg0.amplitude1.set(.4)
self.sawg0.frequency0.set(10*MHz)
self.sawg0.phase0.set(0.)
self.sawg1.amplitude1.set(.4)
self.sawg1.frequency0.set(10*MHz)
self.sawg1.phase0.set(0.)
self.ttl_sma.pulse(200*ns)
self.sawg1.set_amplitude(.1)
self.sawg1.amplitude1.set(.1)
delay(200*ns)
self.sawg1.set_amplitude(-.4)
self.sawg1.amplitude1.set(-.4)
self.ttl_sma.pulse(200*ns)
self.sawg1.set_amplitude(.4)
self.sawg1.amplitude1.set(.4)
delay(200*ns)
self.sawg1.set_phase(.25)
self.sawg1.phase0.set(.25)
self.ttl_sma.pulse(200*ns)
self.sawg1.set_phase(.5)
self.sawg1.phase0.set(.5)
delay(200*ns)
self.sawg0.set_phase(.5)
self.sawg0.phase0.set(.5)
self.ttl_sma.pulse(200*ns)
self.sawg1.set_frequency(30*MHz)
self.sawg1.frequency0.set(30*MHz)
delay(200*ns)
self.sawg1.set_frequency(10*MHz)
self.sawg1.set_phase(0.)
self.sawg1.frequency0.set(10*MHz)
self.sawg1.phase0.set(0.)
self.ttl_sma.pulse(200*ns)
33 changes: 0 additions & 33 deletions artiq/examples/phaser/repository/sawg.py

This file was deleted.

6 changes: 3 additions & 3 deletions artiq/frontend/artiq_devtool.py
Original file line number Diff line number Diff line change
@@ -22,13 +22,13 @@ def get_argparser():

verbosity_args(parser)

parser.add_argument("--host", nargs=1, metavar="HOST",
parser.add_argument("--host", metavar="HOST",
type=str, default="lab.m-labs.hk",
help="SSH host where the development board is located")
parser.add_argument("--serial", nargs=1, metavar="SERIAL",
parser.add_argument("--serial", metavar="SERIAL",
type=str, default="/dev/ttyUSB0",
help="TTY device corresponding to the development board")
parser.add_argument("--ip", nargs=1, metavar="IP",
parser.add_argument("--ip", metavar="IP",
type=str, default="kc705.lab.m-labs.hk",
help="IP address corresponding to the development board")

Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
from migen.build.generic_platform import *


fmc_adapter_io = [
ad9154_fmc_ebz = [
("ad9154_spi", 0,
# AD9154 should give control of SPI to FMC when USB cable is unplugged,
# It's the case, but the PIC18F24J50 is introducing noise on SPI SCK
3 changes: 1 addition & 2 deletions artiq/gateware/dsp/sawg.py
Original file line number Diff line number Diff line change
@@ -88,8 +88,7 @@ def __init__(self, widths, orders, **kwargs):
a = Spline(order=orders.a, width=widths.a)
self.a = a.tri(widths.t)
self.submodules += a
super().__init__(widths._replace(a=len(self.a.a0)),
orders, **kwargs)
super().__init__(widths._replace(a=len(self.a.a0)), orders, **kwargs)

###

7 changes: 4 additions & 3 deletions artiq/gateware/targets/phaser.py
Original file line number Diff line number Diff line change
@@ -22,7 +22,8 @@
from misoc.integration.builder import builder_args, builder_argdict

from artiq.gateware.soc import AMPSoC, build_artiq_soc
from artiq.gateware import rtio, phaser
from artiq.gateware import rtio
from artiq.gateware.ad9154_fmc_ebz import ad9154_fmc_ebz
from artiq.gateware.rtio.phy import (ttl_simple, ttl_serdes_7series,
sawg)
from artiq import __version__ as artiq_version
@@ -172,7 +173,7 @@ def __init__(self, cpu_type="or1k", **kwargs):
])

platform = self.platform
platform.add_extension(phaser.fmc_adapter_io)
platform.add_extension(ad9154_fmc_ebz)

self.submodules.leds = gpio.GPIOOut(Cat(
platform.request("user_led", 0),
@@ -201,7 +202,7 @@ def __init__(self, cpu_type="or1k", **kwargs):
rtio_channels.append(rtio.Channel.from_phy(phy))

sysref_pads = platform.request("ad9154_sysref")
phy = ttl_serdes_7series.Inout_8X(sysref_pads.p, sysref_pads.n)
phy = ttl_serdes_7series.Input_8X(sysref_pads.p, sysref_pads.n)
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=32,
ofifo_depth=2))
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