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base repository: m-labs/nmigen
base: 9661e897e651
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head repository: m-labs/nmigen
compare: 90f1503c918c
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  • 2 commits
  • 9 files changed
  • 1 contributor

Commits on Dec 13, 2018

  1. compat.genlib.fsm: import/wrap Migen code.

    whitequark committed Dec 13, 2018
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  2. fhdl.ir: record port direction explicitly. 

    No point in recalculating this in the backend when writing RTLIL or
Verilog port directions.
    whitequark committed Dec 13, 2018
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